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Testbench#187

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tancheng merged 9 commits intomainfrom
testbench
Nov 11, 2025
Merged

Testbench#187
tancheng merged 9 commits intomainfrom
testbench

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@n0thingNoob
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@n0thingNoob n0thingNoob commented Nov 8, 2025

Summary
When data moves between PEs via links with register mapping, the generated
ASM instructions use incorrect direction operands. For example, PE(2,1) should
receive data in histogram from PE(2,2) via NORTH direction, but the original code generated
SOUTH instead.

Changes:

  1. Fix handleRegisterRewiring: Add invertDir when computing incoming_dir
    for placeDstDeposit. The deposit instruction is placed on the destination
    tile and needs to know from which direction data arrives.

  2. Fix handleDirectionRewiring: Calculate direction based on consumer's actual
    tile location instead of assuming it's always on the link destination tile.
    When consumer is on a different tile, compute the direction from destination
    tile to consumer tile.

Files Changed:

  • lib/NeuraDialect/Transforms/GenerateCodePass.cpp
    • Line 519: Add invertDir for register deposit direction
    • Lines 535-564: Enhance handleDirectionRewiring to handle consumers on
      different tiles
    • Line 593: Pass topo parameter to handleDirectionRewiring

@n0thingNoob n0thingNoob requested review from Copilot and tancheng and removed request for Copilot November 8, 2025 02:42
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Pull Request Overview

This PR improves the code generation pass for CGRA (Coarse-Grained Reconfigurable Array) routing by fixing direction computation for cross-tile data movement and standardizing variable naming conventions.

  • Fixes direction rewiring logic to correctly compute incoming directions when consumers are not located on link destination tiles
  • Adds explicit direction inversion for incoming directions at destination tiles in register deposits
  • Standardizes parameter naming from camelCase to snake_case throughout affected functions

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- Updated AFTER_CANONICALIZE expectations to match new canonicalize-live-in behavior (3 args instead of 4)
- Updated ASM expectations to match new code generation output (II=12, PE(0,0) format)
- Fixed FileCheck pattern to handle empty line between II and PE declarations
@tancheng tancheng merged commit 1cb3c7c into main Nov 11, 2025
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3 participants