[AArch64] Workaround to Package discrete voltage: the highest Vcore

cyring · Jul 9, 2024 · 9235fb3 · 9235fb3
1 parent 4c4e5c7
commit 9235fb3
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Showing 2 changed files with 9 additions and 8 deletions.
diff --git a/aarch64/corefreqd.c b/aarch64/corefreqd.c
@@ -1706,6 +1706,7 @@ REASON_CODE Core_Manager(REF *Ref)
 		];
 
 	PFlip->Thermal.Temp = 0;
+	PFlip->Voltage.VID.CPU = 0;
 	/*	Reset the averages & the max frequency			*/
 	RO(Shm)->Proc.Avg.Turbo = 0;
 	RO(Shm)->Proc.Avg.C0    = 0;
@@ -1799,7 +1800,11 @@ REASON_CODE Core_Manager(REF *Ref)
 		if (CFlop->Thermal.Temp > PFlip->Thermal.Temp)
 			PFlip->Thermal.Temp = CFlop->Thermal.Temp;
 	}
-
+	/*	Workaround to a Package discrete voltage: the highest Vcore */
+	if (!RO(Proc)->PowerThermal.VID.CPU) {
+		if (CFlop->Voltage.VID > PFlip->Voltage.VID.CPU)
+			PFlip->Voltage.VID.CPU = CFlop->Voltage.VID;
+	}
 	/*	Workaround to RAPL Package counter: sum of all Cores	*/
 	Pkg_ComputePowerFormula(RW(Proc), CFlop);
 
@@ -1908,7 +1913,10 @@ REASON_CODE Core_Manager(REF *Ref)
 	Pkg_ComputeThermalFormula(PFlip, SProc);
       }
 	/*	Package Voltage formulas				*/
+      if (RO(Proc)->PowerThermal.VID.CPU)
+      {
 	PFlip->Voltage.VID.CPU = RO(Proc)->PowerThermal.VID.CPU;
+      }
 	PFlip->Voltage.VID.SOC = RO(Proc)->PowerThermal.VID.SOC;
 
 	Pkg_ComputeVoltageFormula(PFlip);

diff --git a/aarch64/corefreqk.c b/aarch64/corefreqk.c
@@ -3406,13 +3406,6 @@ static enum hrtimer_restart Cycle_GenericMachine(struct hrtimer *pTimer)
 	case FORMULA_SCOPE_NONE:
 		break;
 	}
-	if (((PUBLIC(RO(Proc))->Features.Hybrid)
-	  && (Core->Bind == PUBLIC(RO(Proc))->Service.Hybrid))
-	 || (Core->Bind == PUBLIC(RO(Proc))->Service.Core))
-	{
-		PUBLIC(RO(Proc))->PowerThermal.VID.CPU = \
-			PRIVATE(OF(Core, AT(Core->Bind)))->OPP[index].VID;
-	}
     }
     #endif /* CONFIG_PM_OPP */
 	BITSET(LOCKLESS, PUBLIC(RW(Core, AT(cpu)))->Sync.V, NTFY);