before adding circuit tikz

docs/conf.py

@@ -124,7 +124,7 @@
 version = piel.__version__
 
 latex_elements: dict = {
-    "preamble": r"\usepackage{bm}\n\usepackage{amssymb}\n\usepackage{esint}",
+    "preamble": r"\usepackage{bm}\n\usepackage{amssymb}\n\usepackage{esint}\n\usepackage{circuitikz}\n\usepackage{tikz}",
     # The paper size ('letterpaper' or 'a4paper').
     #
     # 'papersize': 'letterpaper',

docs/sections/codesign/devices/comparators.rst

@@ -0,0 +1,57 @@
+Comparators
+============
+
+.. raw:: latex
+
+     \begin{circuitikz}[american]
+        \draw (0,0) node[pfet](PMOS1){};
+        \draw (PMOS1.D) to[short, -*] ++(0,-0.25) \coord (PMOSJ1) to[short] ++(0,-0.25) node[pfet, anchor=source](PMOS2){};
+        \draw (PMOSJ1) to[short] ++(1,0) node[pfet, anchor=source, rotate=90](PMOS3){};
+        \draw (PMOS2.D) to[short, -*] ++(0,-0.5) \coord (OUT1) to[short] ++(0,-0.5) node[nfet, anchor=drain](NMOS1){};
+
+        \draw (OUT1) to[short] ++(3,0) node[ocirc](OUT2){};
+
+        \draw (NMOS1.S) to[short, -*] ++(0,-0.25) \coord (NMOSJ1) to[short] ++(0,-0.25) node[nfet, anchor=drain](NMOS2){};
+        \draw (NMOSJ1) to[short] ++(1,0) node[nfet, anchor=source, rotate=-90](NMOS3){};
+
+        \draw (NMOS2.G) to[short, -*] ++(-0.5,0) \coord(NMOS2GO);
+        \draw (NMOS1.G) to[short, -*] ++(-0.5,0) \coord(NMOS1GO);
+        \draw (PMOS1.G) to[short, -*] ++(-0.5,0) \coord(PMOS1GO);
+        \draw (PMOS2.G) to[short, -*] ++(-0.5,0) \coord(PMOS2GO);
+        \draw (NMOS1GO) -- (NMOS2GO) -- (PMOS1GO) -- (PMOS2GO);
+
+        \draw (NMOS3.G) to[short, -*] (NMOS3.G |- OUT1);
+        \draw (PMOS3.G) to[short, -*] (PMOS3.G |- OUT1);
+        \draw (NMOS2GO |- OUT1) node[circ](){} to[short] ++(-1, 0) node[ocirc](){};
+
+        \draw (NMOS2.S) to[short] ++(0, -0.25) \coord(NMOSGND) node[ground](GND1){};
+        \draw (PMOS1.S) to[short] ++(0, 0.25) \coord(PMOSGND) node[vcc](VCC){};
+        \draw (NMOS3.D) to[short] ++(0.25, 0) to[short] ++(0, 0.25)  \coord(NMOSVCC) node[vcc](VCC1){};
+        \draw (PMOS3.D) to[short] ++(0.25, 0) to[short] ++(0, -0.25)  \coord(NMOSVCC) node[ground](GND2){};
+
+        \draw (NMOS3.bulk) |- (GND1);
+        \draw (NMOS1.bulk) to[short] ++(0.5,0) \coord(NMOS1BO);
+        \draw (NMOS2.bulk) to[short, -*] ++(0.5,0) \coord(NMOS2BO);
+        \draw (NMOS1BO) to[short, -*] (NMOS2BO|- GND1);
+
+        \draw (PMOS3.bulk) |- (VCC);
+        \draw (PMOS1.bulk) to[short, -*] ++(0.5,0) \coord(PMOS1BO);
+        \draw (PMOS2.bulk) to[short] ++(0.5,0) \coord(PMOS2BO);
+        \draw (PMOS2BO) to[short, -*] (PMOS1BO |- VCC);
+    \end{circuitikz}
+
+
+.. raw:: latex
+
+     \begin{circuitikz}[american]
+        \draw (0,0) node[npn](HBT1){};
+        \draw (HBT1.B) to[R] ++(-3,0) node[ocirc](IN){};
+        \draw (HBT1.C) to[short, -*] ++(0,0.5) \coord (HBTJ1) to[short] ++(0.5,0) node[npn, anchor=base](HBT2){};
+        \draw (HBT1.E) to[short, -*] (HBT1.E -| HBT2.E) \coord (HBTJ2) node [circ]{} -- (HBT2.E);
+        \draw (HBTJ2) to[R] ++ (0, -2) node[ground](GND){};
+        \draw (HBTJ2) to[R] ++ (0, -2) node[ground](GND){};
+        \draw (HBT2.C) to[short] ++ (1,0) node[ocirc](out){};
+        \draw (HBT2.C) to[R] ++ (0,2) node[vcc](vcc){$V_{CC}=\SI{1}{V}$};
+        \draw (vcc) to[short, *-] (vcc -| HBT1.C) to[R] ++ (0, -2) \coord (HBT1CR1);
+        \draw (HBT1CR1) -- (HBT1.C);
+    \end{circuitikz}

docs/sections/codesign/devices/hv_driver.rst

@@ -1,6 +1,17 @@
 High-Voltage RF Amplifier
 =========================
 
+Metrics
+--------
+
+.. math::
+
+    \eta_{PA} = \frac{P_{out}}{P_{DC}}
+
+.. math::
+
+    \eta_{PAE} = \frac{P_{out} - P_{in}}{P_{DC}} = \left ( 1 - \frac{1}{G} \frac{P_{out}}{P_{DC}} \right ) = \left ( 1 - \frac{1}{G }\right ) \eta_{PA}
+
 General LNA Design References
 -----------------------------
 
@@ -170,7 +181,7 @@ Ultra-Wideband HV RF Amplifiers
      - 23.6 @ 20 GHz |br| 22.0 @ 40 GHz
      - 5.5
      - 15.9
-   * - Power Added Efficiency Max (%)
+   * - Power Added Efficiency (PAE) Max (%)
      - -
      - 17.8 @ 20 GHz |br| 12.4 @ 40 GHz
      - 5.5
@@ -205,8 +216,3 @@ Stacked HV Amplifiers
 3. Cui, J., et al. (2016). Stacking CMOS-based power amplifiers: Design challenges and strategies. IEEE Transactions on Circuits and Systems I: Regular Papers, 63(12), 2095-2105.
 4. Agah, A., et al. (2014). Multi-drive power amplifier with three-stack structure. IEEE Transactions on Microwave Theory and Techniques, 62(5), 1074-1085.
 5. Lee, C., et al. (2010). High-voltage amplifier using series-bias four cascode power cells. IEEE Journal of Solid-State Circuits, 45(6), 1305-1314.
-
-
-
-
-

docs/sections/codesign/devices/index.rst

@@ -0,0 +1,19 @@
+Device Design Principles
+=========================
+
+In order to design electronic-photonic systems, it is necessary to understand relationships between the metrics used to device and describe individual devices. This section will provide a brief overview of the most common device metrics and how they are related to each other.
+
+.. toctree::
+   :maxdepth: 2
+   :hidden:
+
+   lna
+   hv_driver
+   digital_cell
+   comparators
+
+
+.. include:: lna.rst
+.. include:: hv_driver.rst
+.. include:: digital_cell.rst
+.. include:: comparators.rst

docs/sections/codesign/devices/lna.rst

@@ -1,5 +1,5 @@
-Low-Noise Amplifier Modelling
-=================================
+Low-Noise Amplifier
+====================
 
 General LNA Design References
 -----------------------------

docs/sections/codesign/index.rst

@@ -8,5 +8,6 @@ This section aims to provide some of the theory and background implementation co
     :caption: Contents:
 
     principles/index
+    devices/index
     solvers/index
     parametric