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Verilog: KNOWNBUG test for using identifier of instance in instance array
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KNOWNBUG
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instance_array2.sv
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^file .* line 9: no support for instance arrays$
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^EXIT=2$
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^SIGNAL=0$
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--
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--
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This does not parse.
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// 1800-2017 23.3.3.5
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module sub(input i);
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endmodule
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module main;
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sub my_instance[8:1](8'b1111_0000);
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initial #1 assert(my_instance[1].i == 0);
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initial #1 assert(my_instance[2].i == 0);
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initial #1 assert(my_instance[3].i == 0);
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initial #1 assert(my_instance[4].i == 0);
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initial #1 assert(my_instance[5].i == 1);
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initial #1 assert(my_instance[6].i == 1);
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initial #1 assert(my_instance[7].i == 1);
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initial #1 assert(my_instance[8].i == 1);
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endmodule

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