Skip to content

pre-commit: PR183688 #3519

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
zyw-bot wants to merge 3 commits into
base: main
Choose a base branch
from
Open

pre-commit: PR183688 #3519

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
fda26ef
pre-commit: PR183688
nikic Feb 27, 2026
ec02917
pre-commit: Update
github-actions[bot] Feb 27, 2026
2482eae
pre-commit: Remap
github-actions[bot] Feb 27, 2026
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
8 changes: 7 additions & 1 deletion bench/abc/optimized/cnfPost.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@ define void @Cnf_ManPostprocess_old(ptr noundef readonly captures(none) %0) loca
.lr.ph: ; preds = %1
%7 = getelementptr i8, ptr %4, i64 8
%.val38 = load ptr, ptr %7, align 8, !tbaa !27
%.not.i = icmp ne ptr %4, null
%wide.trip.count61 = zext nneg i32 %.val to i64
br label %8

Expand Down Expand Up @@ -50,6 +51,7 @@ define void @Cnf_ManPostprocess_old(ptr noundef readonly captures(none) %0) loca
br i1 %.not, label %.critedge2, label %Aig_ManObj.exit.lr.ph

Aig_ManObj.exit.lr.ph: ; preds = %.preheader
tail call void @llvm.assume(i1 %.not.i)
%21 = lshr i32 %.fr, 15
%22 = and i32 %21, 4094
%.not37 = icmp eq i32 %22, 0
Expand Down Expand Up @@ -459,12 +461,16 @@ declare void @llvm.lifetime.start.p0(ptr captures(none)) #4
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(ptr captures(none)) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)
declare void @llvm.assume(i1 noundef) #5

attributes #0 = { nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }
attributes #5 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2}

Expand Down
14 changes: 10 additions & 4 deletions bench/abc/optimized/llb1Hint.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -311,11 +311,13 @@ Vec_IntFree.exit: ; preds = %Vec_IntFree.exit.lo
.critedge2.preheader: ; preds = %132
%.val75.pre = load i32, ptr %62, align 4, !tbaa !34
%69 = icmp sgt i32 %.val75.pre, 1
%.not.i100 = icmp ne ptr %133, null
br i1 %69, label %.critedge2.preheader.split.us, label %.split.us

.critedge2.preheader.split.us: ; preds = %.critedge2.preheader
%70 = add nsw i32 %.val75.pre, -1
%71 = getelementptr i8, ptr %133, i64 8
tail call void @llvm.assume(i1 %.not.i100)
%.val.i101.us = load ptr, ptr %71, align 8, !tbaa !23
%wide.trip.count = zext i32 %70 to i64
br label %.critedge2.us
Expand Down Expand Up @@ -761,6 +763,9 @@ declare i32 @llvm.smax.i32(i32, i32) #15
; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare range(i32 -1, 2) i32 @llvm.scmp.i32.i32(i32, i32) #15

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)
declare void @llvm.assume(i1 noundef) #16

attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none, target_mem0: none, target_mem1: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
Expand All @@ -777,10 +782,11 @@ attributes #12 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-si
attributes #13 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #14 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #15 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }
attributes #16 = { nounwind }
attributes #17 = { nounwind willreturn memory(read) }
attributes #18 = { nounwind allocsize(0) }
attributes #19 = { nounwind allocsize(1) }
attributes #16 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
attributes #17 = { nounwind }
attributes #18 = { nounwind willreturn memory(read) }
attributes #19 = { nounwind allocsize(0) }
attributes #20 = { nounwind allocsize(1) }

!llvm.module.flags = !{!0, !1, !2}

Expand Down
8 changes: 5 additions & 3 deletions bench/abseil-cpp/optimized/cord_test.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -59415,8 +59415,10 @@ _ZN4absl12log_internal10LogMessagelsILi20EEERS1_RAT__Kc.exit: ; preds = %14
26: ; preds = %17, %23
%27 = phi i8 [ %.pre, %23 ], [ %21, %17 ]
%.0.i23 = phi ptr [ %25, %23 ], [ %19, %17 ]
%28 = getelementptr inbounds nuw i8, ptr %.0.i23, i64 8
%29 = atomicrmw add ptr %28, i32 2 monotonic, align 4
%28 = icmp ne ptr %.0.i23, null
tail call void @llvm.assume(i1 %28)
%29 = getelementptr inbounds nuw i8, ptr %.0.i23, i64 8
%30 = atomicrmw add ptr %29, i32 2 monotonic, align 4
%or.cond.i = icmp ult i8 %27, 5
br i1 %or.cond.i, label %30, label %31, !prof !858

Expand All @@ -59429,7 +59431,7 @@ _ZN4absl12log_internal10LogMessagelsILi20EEERS1_RAT__Kc.exit: ; preds = %14

31: ; preds = %26
%32 = invoke noalias noundef nonnull dereferenceable(32) ptr @_Znwm(i64 noundef 32) #42
to label %33 unwind label %46
to label %34 unwind label %46

33: ; preds = %31
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(32) %32, i8 0, i64 16, i1 false)
Expand Down
30 changes: 23 additions & 7 deletions bench/actix-rs/optimized/190uhijawk1lki5o.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1602,6 +1602,8 @@ _ZN9hashbrown3raw11TableLayout20calculate_layout_for17h6c9846cae15a80ebE.llvm.17
%20 = load ptr, ptr %0, align 8, !nonnull !14, !noundef !14
%21 = sub nsw i64 0, %11
%22 = getelementptr inbounds i8, ptr %20, i64 %21
%23 = icmp sgt i64 %8, -1
tail call void @llvm.assume(i1 %23)
tail call void @__rust_dealloc(ptr noundef nonnull %22, i64 noundef %13, i64 noundef %3) #23
br label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.17787265185908177030.exit"

Expand Down Expand Up @@ -2266,7 +2268,7 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h28bdf7db60e2dbbfE.llvm.1778726
%49 = add i64 %6, 1
%50 = mul nuw i64 %49, %2
%51 = add i64 %3, -1
%52 = add nuw i64 %51, %50
%52 = add nuw i64 %50, %51
%53 = sub i64 0, %3
%54 = and i64 %52, %53
%55 = add i64 %6, 17
Expand All @@ -2285,6 +2287,8 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h28bdf7db60e2dbbfE.llvm.1778726
%63 = load ptr, ptr %0, align 8, !alias.scope !441, !nonnull !14, !noundef !14
%64 = sub nsw i64 0, %54
%65 = getelementptr inbounds i8, ptr %63, i64 %64
%66 = icmp sgt i64 %51, -1
tail call void @llvm.assume(i1 %66)
tail call void @__rust_dealloc(ptr noundef nonnull %65, i64 noundef %56, i64 noundef %3) #23, !noalias !441
br label %_ZN9hashbrown3raw13RawTableInner12free_buckets17h9beddac38499f491E.llvm.17787265185908177030.exit

Expand Down Expand Up @@ -2396,7 +2400,7 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17hd42dc9b01a6d586cE.llvm.1778726
%52 = add i64 %6, 1
%53 = mul nuw i64 %52, %2
%54 = add i64 %3, -1
%55 = add nuw i64 %54, %53
%55 = add nuw i64 %53, %54
%56 = sub i64 0, %3
%57 = and i64 %55, %56
%58 = add i64 %6, 17
Expand All @@ -2415,6 +2419,8 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17hd42dc9b01a6d586cE.llvm.1778726
%66 = load ptr, ptr %0, align 8, !alias.scope !470, !nonnull !14, !noundef !14
%67 = sub nsw i64 0, %57
%68 = getelementptr inbounds i8, ptr %66, i64 %67
%69 = icmp sgt i64 %54, -1
tail call void @llvm.assume(i1 %69)
tail call void @__rust_dealloc(ptr noundef nonnull %68, i64 noundef %59, i64 noundef %3) #23, !noalias !470
br label %_ZN9hashbrown3raw13RawTableInner12free_buckets17h9beddac38499f491E.llvm.17787265185908177030.exit

Expand Down Expand Up @@ -2484,7 +2490,7 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h8632b1dad9c32722E.llvm.1778726
%33 = add i64 %6, 1
%34 = mul nuw i64 %33, %2
%35 = add i64 %3, -1
%36 = add nuw i64 %35, %34
%36 = add nuw i64 %34, %35
%37 = sub i64 0, %3
%38 = and i64 %36, %37
%39 = add i64 %6, 17
Expand All @@ -2503,6 +2509,8 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h8632b1dad9c32722E.llvm.1778726
%47 = load ptr, ptr %0, align 8, !alias.scope !491, !nonnull !14, !noundef !14
%48 = sub nsw i64 0, %38
%49 = getelementptr inbounds i8, ptr %47, i64 %48
%50 = icmp sgt i64 %35, -1
tail call void @llvm.assume(i1 %50)
tail call void @__rust_dealloc(ptr noundef nonnull %49, i64 noundef %40, i64 noundef %3) #23, !noalias !491
br label %_ZN9hashbrown3raw13RawTableInner12free_buckets17h9beddac38499f491E.llvm.17787265185908177030.exit

Expand Down Expand Up @@ -2599,7 +2607,7 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17hcf312f8ec9543d39E.llvm.1778726
%44 = add i64 %7, 1
%45 = mul nuw i64 %44, %2
%46 = add i64 %3, -1
%47 = add nuw i64 %46, %45
%47 = add nuw i64 %45, %46
%48 = sub i64 0, %3
%49 = and i64 %47, %48
%50 = add i64 %7, 17
Expand All @@ -2618,6 +2626,8 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17hcf312f8ec9543d39E.llvm.1778726
%58 = load ptr, ptr %0, align 8, !alias.scope !531, !nonnull !14, !noundef !14
%59 = sub nsw i64 0, %49
%60 = getelementptr inbounds i8, ptr %58, i64 %59
%61 = icmp sgt i64 %46, -1
call void @llvm.assume(i1 %61)
call void @__rust_dealloc(ptr noundef nonnull %60, i64 noundef %51, i64 noundef %3) #23, !noalias !531
br label %_ZN9hashbrown3raw13RawTableInner12free_buckets17h9beddac38499f491E.llvm.17787265185908177030.exit

Expand Down Expand Up @@ -2713,7 +2723,7 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h96563eb21b961c20E.llvm.1778726
%44 = add i64 %7, 1
%45 = mul nuw i64 %44, %2
%46 = add i64 %3, -1
%47 = add nuw i64 %46, %45
%47 = add nuw i64 %45, %46
%48 = sub i64 0, %3
%49 = and i64 %47, %48
%50 = add i64 %7, 17
Expand All @@ -2732,6 +2742,8 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h96563eb21b961c20E.llvm.1778726
%58 = load ptr, ptr %0, align 8, !alias.scope !568, !nonnull !14, !noundef !14
%59 = sub nsw i64 0, %49
%60 = getelementptr inbounds i8, ptr %58, i64 %59
%61 = icmp sgt i64 %46, -1
call void @llvm.assume(i1 %61)
call void @__rust_dealloc(ptr noundef nonnull %60, i64 noundef %51, i64 noundef %3) #23, !noalias !568
br label %_ZN9hashbrown3raw13RawTableInner12free_buckets17h9beddac38499f491E.llvm.17787265185908177030.exit

Expand Down Expand Up @@ -2801,7 +2813,7 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h5a05490bc649612eE.llvm.1778726
%33 = add i64 %6, 1
%34 = mul nuw i64 %33, %2
%35 = add i64 %3, -1
%36 = add nuw i64 %35, %34
%36 = add nuw i64 %34, %35
%37 = sub i64 0, %3
%38 = and i64 %36, %37
%39 = add i64 %6, 17
Expand All @@ -2820,6 +2832,8 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h5a05490bc649612eE.llvm.1778726
%47 = load ptr, ptr %0, align 8, !alias.scope !589, !nonnull !14, !noundef !14
%48 = sub nsw i64 0, %38
%49 = getelementptr inbounds i8, ptr %47, i64 %48
%50 = icmp sgt i64 %35, -1
tail call void @llvm.assume(i1 %50)
tail call void @__rust_dealloc(ptr noundef nonnull %49, i64 noundef %40, i64 noundef %3) #23, !noalias !589
br label %_ZN9hashbrown3raw13RawTableInner12free_buckets17h9beddac38499f491E.llvm.17787265185908177030.exit

Expand Down Expand Up @@ -2931,7 +2945,7 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h07e67f333cef6d3dE.llvm.1778726
%52 = add i64 %6, 1
%53 = mul nuw i64 %52, %2
%54 = add i64 %3, -1
%55 = add nuw i64 %54, %53
%55 = add nuw i64 %53, %54
%56 = sub i64 0, %3
%57 = and i64 %55, %56
%58 = add i64 %6, 17
Expand All @@ -2950,6 +2964,8 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h07e67f333cef6d3dE.llvm.1778726
%66 = load ptr, ptr %0, align 8, !alias.scope !618, !nonnull !14, !noundef !14
%67 = sub nsw i64 0, %57
%68 = getelementptr inbounds i8, ptr %66, i64 %67
%69 = icmp sgt i64 %54, -1
tail call void @llvm.assume(i1 %69)
tail call void @__rust_dealloc(ptr noundef nonnull %68, i64 noundef %59, i64 noundef %3) #23, !noalias !618
br label %_ZN9hashbrown3raw13RawTableInner12free_buckets17h9beddac38499f491E.llvm.17787265185908177030.exit

Expand Down
10 changes: 8 additions & 2 deletions bench/actix-rs/optimized/305jwhumkt6l000n.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -646,6 +646,8 @@ _ZN9hashbrown3raw11TableLayout20calculate_layout_for17h6c9846cae15a80ebE.llvm.84
%20 = load ptr, ptr %0, align 8, !nonnull !4, !noundef !4
%21 = sub nsw i64 0, %11
%22 = getelementptr inbounds i8, ptr %20, i64 %21
%23 = icmp sgt i64 %8, -1
tail call void @llvm.assume(i1 %23)
tail call void @__rust_dealloc(ptr noundef nonnull %22, i64 noundef %13, i64 noundef %3) #24
br label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.8426763234977947650.exit"

Expand Down Expand Up @@ -947,7 +949,7 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17hf602183498fe76d3E.llvm.8426763
%52 = add i64 %6, 1
%53 = mul nuw i64 %52, %2
%54 = add i64 %3, -1
%55 = add nuw i64 %54, %53
%55 = add nuw i64 %53, %54
%56 = sub i64 0, %3
%57 = and i64 %55, %56
%58 = add i64 %6, 17
Expand All @@ -966,6 +968,8 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17hf602183498fe76d3E.llvm.8426763
%66 = load ptr, ptr %0, align 8, !alias.scope !209, !nonnull !4, !noundef !4
%67 = sub nsw i64 0, %57
%68 = getelementptr inbounds i8, ptr %66, i64 %67
%69 = icmp sgt i64 %54, -1
tail call void @llvm.assume(i1 %69)
tail call void @__rust_dealloc(ptr noundef nonnull %68, i64 noundef %59, i64 noundef %3) #24, !noalias !209
br label %_ZN9hashbrown3raw13RawTableInner12free_buckets17h45aa5389e0a32161E.llvm.8426763234977947650.exit

Expand Down Expand Up @@ -1075,7 +1079,7 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h47f5b8b1a4d1a893E.llvm.8426763
%49 = add i64 %6, 1
%50 = mul nuw i64 %49, %2
%51 = add i64 %3, -1
%52 = add nuw i64 %51, %50
%52 = add nuw i64 %50, %51
%53 = sub i64 0, %3
%54 = and i64 %52, %53
%55 = add i64 %6, 17
Expand All @@ -1094,6 +1098,8 @@ _ZN9hashbrown3raw13RawTableInner13drop_elements17h47f5b8b1a4d1a893E.llvm.8426763
%63 = load ptr, ptr %0, align 8, !alias.scope !254, !nonnull !4, !noundef !4
%64 = sub nsw i64 0, %54
%65 = getelementptr inbounds i8, ptr %63, i64 %64
%66 = icmp sgt i64 %51, -1
tail call void @llvm.assume(i1 %66)
tail call void @__rust_dealloc(ptr noundef nonnull %65, i64 noundef %56, i64 noundef %3) #24, !noalias !254
br label %_ZN9hashbrown3raw13RawTableInner12free_buckets17h45aa5389e0a32161E.llvm.8426763234977947650.exit

Expand Down
Loading