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f25dfbe
update housekeeping sys registers
May 3, 2023
08aac69
add clock redirect test
May 3, 2023
a360631
update IRQ_external with functions
May 3, 2023
988df74
add hk_regs_wr_wb_cpu test C code
May 3, 2023
f1adfe9
added hex files for new tests
marwaneltoukhy May 7, 2023
6c90621
update gpio input tests to be nopull rather than pulldown
May 7, 2023
8bdedfb
Add bitbang tests
May 7, 2023
2ef1dd6
Merge branch 'chipignite-dev3-C-tests' of github.com:efabless/caravel…
May 7, 2023
28ad5ba
update number of bits for bitbang to 13
May 7, 2023
d4b92d4
add macro define SKY to def.h
May 7, 2023
47413c5
Merge pull request #53 from efabless/chipignite-dev3
marwaneltoukhy May 8, 2023
c5c065b
Update isr file to match commit 5f7f3dcaf157cf91ea1f5a774554f0ca920193cc
May 9, 2023
737465d
fix clock_redirect test to redirect the 2 ports
May 9, 2023
765268a
added hex files for IRQ_external and clock_redirect
marwaneltoukhy May 9, 2023
c7ce753
added hk_regs_wr_wb_cpu test in manifest
marwaneltoukhy May 9, 2023
bc9e9ed
fixed passing criteria of hk_regs_wr_wb_cpu
marwaneltoukhy May 9, 2023
0ca072a
fix bugs at test hk_regs_wr_wb_cpu
May 9, 2023
eeb54f2
Merge branch 'chipignite-dev3-C-tests' of github.com:efabless/caravel…
May 9, 2023
1f36100
fixed packets
marwaneltoukhy May 9, 2023
aa60f7d
added bitbang tests
marwaneltoukhy May 9, 2023
9c575c9
add debug test
May 9, 2023
a7fc1e1
Merge branch 'chipignite-dev3-C-tests' of github.com:efabless/caravel…
May 9, 2023
dc60628
debug clock redirect
marwaneltoukhy May 9, 2023
a115902
Merge branch 'chipignite-dev3-C-tests' of github.com:efabless/caravel…
marwaneltoukhy May 9, 2023
68d6821
added debug hex file
marwaneltoukhy May 10, 2023
5befd27
added debug hex file
marwaneltoukhy May 10, 2023
2d13033
added debug hex file
marwaneltoukhy May 10, 2023
5795a96
add cpu_reset test
May 10, 2023
b26b149
add uart_recieve_back test
May 10, 2023
4276140
added uart_recieve_back hex
marwaneltoukhy May 10, 2023
9030f1c
removed clock_redirect
marwaneltoukhy May 10, 2023
cd3aba1
added cpu_reset test
marwaneltoukhy May 10, 2023
48fc9dd
added delay between send packets
marwaneltoukhy May 10, 2023
7020ab8
uncomment flashing
marwaneltoukhy May 10, 2023
38f8677
remove cpu_reset from manifest
marwaneltoukhy May 10, 2023
905788f
added clock_redirect test
marwaneltoukhy May 15, 2023
182e223
debugging spi_rd
marwaneltoukhy May 15, 2023
f227c8c
updated logs for running and added flash log file
marwaneltoukhy May 17, 2023
73ec7d2
updated logs for running and added flash log file
marwaneltoukhy May 17, 2023
b23221f
updated logs for running and added flash log file
marwaneltoukhy May 17, 2023
60ddf0a
updated logs for running and added flash log file
marwaneltoukhy May 17, 2023
bb5c1d7
changed logging to printing & added table of results
marwaneltoukhy May 17, 2023
4fe8df6
some fixes for logging
marwaneltoukhy May 17, 2023
c46600d
some fixes for logging
marwaneltoukhy May 17, 2023
9aa1f3c
some fixes for logging
marwaneltoukhy May 17, 2023
2c0842a
some fixes for logging
marwaneltoukhy May 17, 2023
ada61f5
some fixes for logging
marwaneltoukhy May 17, 2023
7e59aee
synced with chipignite-dev3-C-tests
marwaneltoukhy May 17, 2023
7000a66
Merge branch 'chipignite-dev3-C-tests' into update_logs
marwaneltoukhy May 17, 2023
9e8c362
Merge pull request #54 from efabless/update_logs
marwaneltoukhy May 17, 2023
9595a11
updated reporting result to csv
marwaneltoukhy May 17, 2023
5f4f15b
updated reporting result to csv
marwaneltoukhy May 17, 2023
0a0de78
updated reporting result to csv
marwaneltoukhy May 17, 2023
1a4f2dd
updated reporting result to csv
marwaneltoukhy May 17, 2023
822d454
updated reporting result to csv
marwaneltoukhy May 17, 2023
6c53f7a
autodetect external power supply
marwaneltoukhy Dec 18, 2023
498b5f1
autodetect external power supply
marwaneltoukhy Dec 18, 2023
a10cad3
autodetect external power supply
marwaneltoukhy Dec 18, 2023
8a50e57
autodetect external power supply
marwaneltoukhy Dec 18, 2023
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628 changes: 530 additions & 98 deletions caravel.py

Large diffs are not rendered by default.

35 changes: 6 additions & 29 deletions caravel_board/firmware_vex/mpw8_tests/IRQ_external/IRQ_external.c
Original file line number Diff line number Diff line change
Expand Up @@ -15,19 +15,11 @@
* SPDX-License-Identifier: Apache-2.0
*/

#include <csr.h>
#include <soc.h>
#include <irq_vex.h>
#include <uart.h>

#include "../defs.h"
// #include "../gpio_config/gpio_config_io.c"
#include "../common/send_packet.c"
#include <common.h>

/*
Testing timer interrupts
Enable interrupt for IRQ external pin mprj_io[7] -> should be drived to 1 by the environment
**NOTE** housekeeping SPI should used to update register irq_1_inputsrc to 1 see verilog code

@wait for environment to make mprj[7] high
send packet size = 1
Expand All @@ -45,32 +37,17 @@ Enable interrupt for IRQ external pin mprj_io[7] -> should be drived to 1 by the

*/

extern uint16_t flag;

void main()
{
uint16_t data;
int i;

flag = 0;
clear_flag();
configure_mgmt_gpio();

// setting bit 7 as input
reg_mprj_io_7 = GPIO_MODE_MGMT_STD_INPUT_NOPULL;
// gpio_config_io();
reg_mprj_xfer = 1;
while (reg_mprj_xfer == 1)
;

irq_setmask(0);
irq_setie(1);

// irq_setmask(irq_getmask() | (1 << TIMER0_INTERRUPT));
configure_gpio(7,GPIO_MODE_MGMT_STD_INPUT_NOPULL);

// irq_setmask(irq_getmask() | 0x3f);
irq_setmask(irq_getmask() | (1 << USER_IRQ_4_INTERRUPT));
// irq_setmask(irq_getmask() | ( 0x3f));
reg_user4_irq_en = 1;
gpio_config_load();
enable_external1_irq(1);
reg_irq_source = 1;
send_packet(1); // wait for environment to make mprj[7] high

Expand All @@ -81,7 +58,7 @@ void main()

for (int i = 0; i < timeout; i++)
{
if (flag == 1)
if (get_flag() == 1)
{
send_packet(5); // test pass irq sent
is_pass = true;
Expand Down
737 changes: 689 additions & 48 deletions caravel_board/firmware_vex/mpw8_tests/IRQ_external/IRQ_external.hex

Large diffs are not rendered by default.

54 changes: 4 additions & 50 deletions caravel_board/firmware_vex/mpw8_tests/IRQ_external/Makefile
Original file line number Diff line number Diff line change
@@ -1,63 +1,17 @@
#TOOLCHAIN_PATH=/home/marwan/Downloads/riscv/bin/
TOOLCHAIN_PATH=/usr/local/bin/

#TOOLCHAIN_PATH=/opt/riscv32imc/bin/
# TOOLCHAIN_PATH=/ef/apps/bin/

# Set the prefix for `riscvXX-unknown-elf-*`
# On installations using `multilib`, this will be `riscv64` even for compiling to 32-bit targets
TOOLCHAIN_PREFIX=riscv64
#TOOLCHAIN_PREFIX=riscv32

INCLUDES=-I$(shell pwd) -I../../ -I../../generated/
VOLTAGE=$(shell python3 -c "from gpio_config_def import voltage; print(voltage)")
# TOOLCHAIN_PREFIX=riscv32

# ---- Test patterns for project raven ----

.SUFFIXES:

PATTERN = IRQ_external

hex: ${PATTERN:=.hex}

#../../gpio_config/gpio_config_data.c: ../../gpio_config/gpio_config_def.py
# cd ../../gpio_config; python3 ../../gpio_config/gpio_config_builder.py

# gpio_config_data.c: gpio_config_def.py gpio_config_io.py
# python3 ../../gpio_config/gpio_config_builder.py

#%.elf: %.c ../../sections.lds ../../crt0_vex.S ../../gpio_config/gpio_config_data.c
#%.elf: %.c ../../sections.lds ../../crt0_vex.S gpio_config_data.c
# $(TOOLCHAIN_PATH)riscv64-unknown-elf-gcc -I../../ -I../../generated/ -I../common/ -O0 -mabi=ilp32 -march=rv32i -D__vexriscv__ -Wl,-Bstatic,-T,../../sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ ../../crt0_vex.S ../../isr.c ../../gpio_program.c $<
# ${TOOLCHAIN_PATH}riscv64-unknown-elf-objdump -s uart.elf > uart.lst

%.elf: %.c ../../sections.lds ../../crt0_vex.S
$(TOOLCHAIN_PATH)$(TOOLCHAIN_PREFIX)-unknown-elf-gcc $(INCLUDES) -O0 -mabi=ilp32 -march=rv32i -D__vexriscv__ -Wl,-Bstatic,-T,../../sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ ../../crt0_vex.S ../../isr.c $<
${TOOLCHAIN_PATH}$(TOOLCHAIN_PREFIX)-unknown-elf-objdump -D $@ > $*.lst

%.hex: %.elf
$(TOOLCHAIN_PATH)riscv64-unknown-elf-objcopy -O verilog $< $@
sed -ie 's/@10/@00/g' $@

%.bin: %.elf
$(TOOLCHAIN_PATH)$(TOOLCHAIN_PREFIX)-unknown-elf-objcopy -O binary $< $@

client: client.c
gcc client.c -o client

flash: IRQ_external.hex
python3 ../util/caravel_hkflash.py IRQ_external.hex
python3 ../util/caravel_hkstop.py

flash2: IRQ_external.hex
python3 ../util/caravel_flash.py IRQ_external.hex

# ---- Clean ----

clean:
rm -f *.elf *.hex *.bin *.vvp *.vcd *.hexe *.lst *.hexe *.lst gpio_config_data.c

.PHONY: clean hex all flash
TESTNAME = IRQ_external


include ../common/Makefile.common


Binary file not shown.
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -15,21 +15,13 @@
* SPDX-License-Identifier: Apache-2.0
*/

#include <csr.h>
#include <soc.h>
#include <irq_vex.h>
#include <uart.h>

#include "../defs.h"
// #include "../gpio_config/gpio_config_io.c"
#include "../common/send_packet.c"
#include <common.h>

/*
Testing timer interrupts
Enable interrupt for IRQ external pin mprj_io[7] -> should be drived to 1 by the environment
**NOTE** housekeeping SPI should used to update register irq_1_inputsrc to 1 see verilog code
Enable interrupt for IRQ external pin mprj_io[12] -> should be drived to 1 by the environment

@wait for environment to make mprj[7] high
@wait for environment to make mprj[12] high
send packet size = 1

@received interrupt correctly test pass
Expand All @@ -45,33 +37,18 @@ Enable interrupt for IRQ external pin mprj_io[7] -> should be drived to 1 by the

*/

extern uint16_t flag;

void main()
{
uint16_t data;
int i;

flag = 0;
clear_flag();
configure_mgmt_gpio();

// setting bit 7 as input
reg_mprj_io_12 = GPIO_MODE_MGMT_STD_INPUT_NOPULL;
// gpio_config_io();
reg_mprj_xfer = 1;
while (reg_mprj_xfer == 1)
;

irq_setmask(0);
irq_setie(1);

// irq_setmask(irq_getmask() | (1 << TIMER0_INTERRUPT));
configure_gpio(12,GPIO_MODE_MGMT_STD_INPUT_NOPULL);

// irq_setmask(irq_getmask() | 0x3f);
irq_setmask(irq_getmask() | (1 << USER_IRQ_5_INTERRUPT));
// irq_setmask(irq_getmask() | ( 0x3f));
reg_user5_irq_en = 1;
reg_irq_source = 2;
gpio_config_load();
enable_external2_irq(1);
reg_irq_source = 2; // enable set housekeeping irq register
send_packet(1); // wait for environment to make mprj[7] high

// Loop, waiting for the interrupt to change reg_mprj_datah
Expand All @@ -81,7 +58,7 @@ void main()

for (int i = 0; i < timeout; i++)
{
if (flag == 1)
if (get_flag() == 1)
{
send_packet(5); // test pass irq sent
is_pass = true;
Expand Down
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