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26 changes: 21 additions & 5 deletions caravel.py
Original file line number Diff line number Diff line change
Expand Up @@ -69,6 +69,7 @@ def __init__(

def log_to_file(self, message):
if self.log_file:
self.log_file = f"{self.date_dir}/terminal_output.log"
logging.basicConfig(filename=self.log_file, level=logging.INFO, format='%(asctime)s - %(message)s')
logging.info(message)

Expand Down Expand Up @@ -145,7 +146,7 @@ def send_pulse(self, num_pulses, channel, pulse_width=25):
channel.set_value(1)
accurate_delay(pulse_width)

def reset(self, duration=1):
def reset(self, duration=0.1):
"""applies reset to the caravel board

Args:
Expand Down Expand Up @@ -313,9 +314,9 @@ def power_up(self):
rm.close()
else:
self.device3v3.supply.set_voltage(self.h_voltage)
time.sleep(1)
time.sleep(0.1)
self.device1v8.supply.set_voltage(self.l_voltage)
time.sleep(1)
time.sleep(0.1)

def power_up_1v8(self):
"""
Expand Down Expand Up @@ -449,6 +450,21 @@ def io_receive(self, pulses, channel):
return True
if time.time() > timeout:
return False

def setup_clock(self, clk_io, data_io):
dwf.FDwfDigitalOutEnableSet(self.device3v3.handle, c_int(self.device3v3.dio_map[clk_io].channel), c_int(1)) # enable DIO 0 as output (clock)
dwf.FDwfDigitalOutEnableSet(self.device3v3.handle, c_int(self.device3v3.dio_map[data_io].channel), c_int(1)) # enable DIO 1 as output (output)

dwf.FDwfDigitalOutDividerSet(self.device3v3.handle, c_int(1)) # set divider to 1 (fastest clock)
dwf.FDwfDigitalOutCounterInitSet(self.device3v3.handle, c_int(0), c_int(1)) # set counter to 1 (fastest clock)

def run_clock(self, data, clk_io, data_io):
self.setup_clock(clk_io, data_io)

for bit in data:
dwf.FDwfDigitalOutCounterSet(self.device3v3.handle, c_int(self.device3v3.dio_map[clk_io].channel), c_int(1), c_int(1)) # set output on positive edge of DIO 0
dwf.FDwfDigitalOutDataSet(self.device3v3.handle, c_int(self.device3v3.dio_map[data_io].channel << bit)) # set output data on DIO 1
time.sleep(0.001) # adjust sleep time as needed


class Device:
Expand Down Expand Up @@ -696,9 +712,9 @@ def write(self, data):
)
return

def read_data(self, test):
def read_data(self, test, timeout=50):
self.open()
timeout = time.time() + 50
timeout = time.time() + timeout
rgRX = b""
while True:
uart_data, count = self.read_uart()
Expand Down
17 changes: 15 additions & 2 deletions caravel_board/firmware_vex/blizzard/ALU_4bits/ALU_4bits.c
Original file line number Diff line number Diff line change
@@ -1,11 +1,20 @@
#include <common.h>
void main()
{
// HKGpio_config();
configure_mgmt_gpio_input();
// while (1)
// {
// if (reg_gpio_in == 0) {
// FPGA IOs
configure_gpio(1, GPIO_MODE_USER_STD_INPUT_NOPULL);
configure_gpio(11, GPIO_MODE_USER_STD_INPUT_NOPULL);
configure_gpio(23, GPIO_MODE_USER_STD_OUTPUT);
configure_gpio(29, GPIO_MODE_USER_STD_INPUT_NOPULL);
configure_gpio(34, GPIO_MODE_USER_STD_INPUT_NOPULL);
configure_gpio(35, GPIO_MODE_USER_STD_INPUT_NOPULL);
configure_gpio(37, GPIO_MODE_USER_STD_INPUT_NOPULL);

configure_gpio(10, GPIO_MODE_USER_STD_INPUT_PULLDOWN);
configure_gpio(11, GPIO_MODE_USER_STD_INPUT_PULLDOWN);
configure_gpio(35, GPIO_MODE_USER_STD_INPUT_PULLDOWN);
Expand All @@ -27,6 +36,10 @@ void main()

// gpio_config_io();
gpio_config_load();
config_uart();
print("Start Test: ALU_4bits\n");
// config_uart();
// config_uart_ios();
// print("ST: ALU_4bits\n");
while (reg_gpio_in == 0)
;
HKGpio_config();
}
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