Add OPEN Alliance SPI support to ADIN1110 SPE driver #4772
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Modify clocks and pins for Bristlemouth dev kit
I copied from the existing stm32u5 dir and deleted any that had build errors. We can add them again in the future, and I'll check the ones that remain on my board before marking the PR ready for review. I'm focusing only on the spe_adin1110_http_server example.
Add support for the OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface (TC6) protocol as an alternative to the Generic SPI protocol. Key features: - Chunk-based protocol with 4-byte header/footer + 64-byte payload - Control transactions for register read/write (DNC=0) - Data transactions for Ethernet frames (DNC=1) - Even parity calculation for error detection - Support for both TX and RX data chunks - Configurable via 'tc6' feature flag Implementation includes: - src/protocol/tc6.rs: TC6 protocol implementation - Adin1110Protocol trait implementation for Tc6<SPI> - MdioBus trait implementation for PHY register access - new_tc6() constructor for easy instantiation - Updated README with TC6 documentation The TC6 protocol is selected via hardware pins (SPI_CFG0/SPI_CFG1) and complements the existing Generic SPI support. 🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude <[email protected]>
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The Bristlemouth dev kit uses the ADIN2111 with config pins strapped for OPEN Alliance SPI. The MCU on the Bristlemouth Mote is an STM32U5. The C and C++ firmware are open source in the bristlemouth GitHub organization, especially bm_core and bm_protocol.
This PR will add OPEN Alliance SPI support to the embassy driver, which currently only supports Generic SPI mode.
Summary of Changes (The Plan)
✨ WIP ✨