Conversation
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It appears there are issues with aliased types, but I’m not sure how to fix them properly. Replacing all aliased types with the real ones? |
There are no such issues. |
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Thanks for the help! Would it be possible to merge the other PRs first and then apply the patch directly on their |
No. This would mean that for a while, esp-idf-svc will become unbuildable until this PR is merged. Did you actually test your changes here in this PR somehow? |
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Sorry, I’m a bit confused. If these two PRs, esp-rs/esp-idf-hal#571 and esp-rs/embedded-svc#86, are merged before this one, and then we patch I can try to fix this PR using my personal branches to see if the ci passes, that's for sure, but I cannot use my branches as a stable solution. I feel like I’m missing something. |
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The point is that I need to see a passing CI of this PR, even if this is temporarily against your branches. Once this is done and you could confirm that -say - one of the wifi examples works after your changes, we can remove the redirection to your personal branches and merge all 3 PRs in a rapid succession after each other. |
That’s exactly what I needed to understand, thank you! Now it’s perfectly clear. |
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CI passes and below there's the output of the OutputChip type: esp32c3 (revision v0.4)
Crystal frequency: 40 MHz
Flash size: 4MB
Features: WiFi, BLE
MAC address: 48:31:b7:3d:b6:84
Partition table: partitions.csv
App/part. size: 1,927,744/3,145,728 bytes, 61.28%
[00:00:00] [========================================] 13/13 0x0
[00:00:00] [========================================] 1/1 0x8000
[00:00:15] [========================================] 907/907 0x10000
[2026-02-26T16:15:36Z INFO ] Flashing has completed!
Commands:
CTRL+R Reset chip
CTRL+C Exit
ESP-ROM:esp32c3-api1-20210207
Build:Feb 7 2021
rst:0x15 (USB_UART_CHIP_RESET),boot:0xd (SPI_FAST_FLASH_BOOT)
Saved PC:0x40380632
0x40380632 - spimem_flash_ll_sync_reset
at /home/esp-idf-svc/.embuild/espressif/esp-idf/v5.4.2/components/hal/esp32c3/include/hal/spimem_flash_ll.h:694
SPIWP:0xee
mode:DIO, clock div:2
load:0x3fcd5820,len:0x1714
load:0x403cc710,len:0x968
load:0x403ce710,len:0x2f9c
entry 0x403cc710
I (19) boot: ESP-IDF v5.1.2-342-gbcf1645e44 2nd stage bootloader
I (20) boot: compile time Dec 12 2023 10:50:58
I (20) boot: chip revision: v0.4
I (24) boot.esp32c3: SPI Speed : 40MHz
I (29) boot.esp32c3: SPI Mode : DIO
I (34) boot.esp32c3: SPI Flash Size : 4MB
I (38) boot: Enabling RNG early entropy source...
I (44) boot: Partition Table:
I (47) boot: ## Label Usage Type ST Offset Length
I (55) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (62) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (69) boot: 2 factory factory app 00 00 00010000 00300000
I (77) boot: End of partition table
I (81) esp_image: segment 0: paddr=00010020 vaddr=3c180020 size=423e4h (271332) map
I (150) esp_image: segment 1: paddr=0005240c vaddr=3fc95a00 size=035dch ( 13788) load
I (153) esp_image: segment 2: paddr=000559f0 vaddr=40380000 size=0a628h ( 42536) load
I (166) esp_image: segment 3: paddr=00060020 vaddr=42000020 size=17b5fch (1553916) map
I (511) esp_image: segment 4: paddr=001db624 vaddr=4038a628 size=0b3c8h ( 46024) load
I (523) esp_image: segment 5: paddr=001e69f4 vaddr=50000000 size=0001ch ( 28) load
I (530) boot: Loaded app from partition at offset 0x10000
I (530) boot: Disabling RNG early entropy source...
I (544) cpu_start: Unicore app
I (552) cpu_start: Pro cpu start user code
I (552) cpu_start: cpu freq: 160000000 Hz
I (553) app_init: Application information:
I (553) app_init: Project name: libespidf
I (557) app_init: App version: 82bcb53-dirty
I (561) app_init: Compile time: Feb 26 2026 17:14:53
I (566) app_init: ELF file SHA256: 000000000...
I (570) app_init: ESP-IDF: v5.4.2
I (574) efuse_init: Min chip rev: v0.3
I (578) efuse_init: Max chip rev: v1.99
I (582) efuse_init: Chip rev: v0.4
I (586) heap_init: Initializing. RAM available for dynamic allocation:
I (592) heap_init: At 3FCA37C0 len 0001C840 (114 KiB): RAM
I (597) heap_init: At 3FCC0000 len 0001C710 (113 KiB): Retention RAM
I (603) heap_init: At 3FCDC710 len 00002950 (10 KiB): Retention RAM
I (609) heap_init: At 5000001C len 00001FCC (7 KiB): RTCRAM
I (616) spi_flash: detected chip: generic
I (618) spi_flash: flash io: dio
W (622) i2c: This driver is an old driver, please migrate your application code to adapt `driver/i2c_master.h`
I (631) sleep_gpio: Configure to isolate all GPIO pins in sleep state
I (637) sleep_gpio: Enable automatic switching of GPIO sleep configuration
I (644) coexist: coex firmware version: 7b9a184
I (648) coexist: coexist rom version 9387209
I (653) main_task: Started on CPU0
I (653) main_task: Calling app_main()
I (663) pp: pp rom version: 9387209
I (663) net80211: net80211 rom version: 9387209
I (673) wifi:wifi driver task: 3fcb1670, prio:23, stack:6656, core=0
I (673) wifi:wifi firmware version: bea31f3
I (673) wifi:wifi certification version: v7.0
I (673) wifi:config NVS flash: enabled
I (683) wifi:config nano formatting: disabled
I (683) wifi:Init data frame dynamic rx buffer num: 32
I (693) wifi:Init static rx mgmt buffer num: 5
I (693) wifi:Init management short buffer num: 32
I (693) wifi:Init dynamic tx buffer num: 32
I (703) wifi:Init static tx FG buffer num: 2
I (703) wifi:Init static rx buffer size: 1600
I (713) wifi:Init static rx buffer num: 10
I (713) wifi:Init dynamic rx buffer num: 32
I (713) wifi_init: rx ba win: 6
I (723) wifi_init: accept mbox: 6
I (723) wifi_init: tcpip mbox: 32
I (723) wifi_init: udp mbox: 6
I (733) wifi_init: tcp mbox: 6
I (733) wifi_init: tcp tx win: 5760
I (733) wifi_init: tcp rx win: 5760
I (733) wifi_init: tcp mss: 1440
I (743) wifi_init: WiFi IRAM OP enabled
I (743) wifi_init: WiFi RX IRAM OP enabled
I (773) phy_init: phy_version 1201,bae5dd99,Mar 3 2025,15:36:21
W (773) phy_init: failed to load RF calibration data (0xffffffff), falling back to full calibration
I (813) phy_init: Saving new calibration data due to checksum failure or outdated calibration data, mode(2)
I (873) wifi:mode : sta (48:31:b7:3d:b6:84)
I (873) wifi:enable tsf
I (883) wifi: Wifi started
I (3293) wifi:new:<1,0>, old:<1,0>, ap:<255,255>, sta:<1,0>, prof:1, snd_ch_cfg:0x0
I (3303) wifi:state: init -> auth (0xb0)
I (3313) wifi:state: auth -> assoc (0x0)
I (3323) wifi:state: assoc -> run (0x10)
I (3363) wifi:connected with Secret, aid = 1, channel 1, BW20, bssid = 2c:3a:fd:cd:5b:54
I (3373) wifi:security: WPA2-PSK, phy: bgn, rssi: -45
I (3383) wifi:pm start, type: 1
I (3383) wifi:dp: 1, bi: 102400, li: 3, scale listen interval from 307200 us to 307200 us
I (3383) wifi:set rx beacon pti, rx_bcn_pti: 14, bcn_timeout: 25000, mt_pti: 14, mt_time: 10000
I (3403) wifi: Wifi connected
I (3403) wifi:<ba-add>idx:0 (ifx:0, 2c:3a:fd:cd:5b:54), tid:6, ssn:2, winSize:64
I (3413) wifi:AP's beacon interval = 102400 us, DTIM period = 1
I (4413) esp_netif_handlers: sta ip: 192.168.178.139, mask: 255.255.255.0, gw: 192.168.178.1
I (4413) wifi: Wifi netif up
I (4413) wifi: Wifi DHCP info: IpInfo { ip: 192.168.178.139, subnet: Subnet { gateway: 192.168.178.1, mask: Mask(24) }, dns: Some(192.168.178.1), secondary_dns: Some(0.0.0.0) }
I (4423) wifi: Shutting down in 5s...
I (9443) wifi:state: run -> init (0x0)
I (9453) wifi:pm stop, total sleep time: 5322438 us / 6066560 us
I (9453) wifi:<ba-del>idx:0, tid:6
I (9453) wifi:new:<1,0>, old:<1,0>, ap:<255,255>, sta:<1,0>, prof:1, snd_ch_cfg:0x0
I (9493) wifi:flush txq
I (9493) wifi:stop sw txq
I (9493) wifi:lmac stop hw txq
I (9493) esp_idf_svc::wifi: EspWifi dropped
I (9503) esp_idf_svc::netif: Dropped
I (9503) esp_idf_svc::netif: Dropped
I (9513) wifi:Deinit lldesc rx mblock:10
I (9523) esp_idf_svc::nvs: NvsDefault dropped
I (9533) esp_idf_svc::eventloop: System event loop dropped
I (9533) main_task: Returned from app_main() |
ivmarkov
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There is only one request - now that CI passes - to redirect back to the main GIT versions of esp-idf-hal and embedded-svc.
There are two minor change requests to the sibling PRs in embedded-svc and esp-idf-hal. Once you do the change request to the two sibling PRs and the one here, I'll merge all three in a rapid sequence.
Thanks again (and sorry for the delay)!
Done. Seems a good plan, thanks!
Do not worry for the delay, thanks to you for your help! |
Submission Checklist 📝
cargo fmtcommand to ensure that all changed code is formatted correctly.cargo clippycommand to ensure that all changed code passes latest Clippy nightly lints.CHANGELOG.mdin the proper section.Pull Request Details 📖
Description
This PR updates
heaplessto its latest version, in accordance with the request made by @ivmarkov in esp-rs/embedded-svc#86