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8319690: [AArch64] C2 compilation hits offset_ok_for_immed: assert "c…
…2 compiler bug" On LP64 systems, if the heap can be moved into low virtual address space (below 4GB) and the heap size is smaller than the interesting threshold of 4 GB, we can use unscaled decoding pattern for narrow klass decoding. It means that a generic field reference can be decoded by: ``` cast<64> (32-bit compressed reference) + field_offset ``` When the `field_offset` is an immediate, on aarch64 platform, the unscaled decoding pattern can match perfectly with a direct addressing mode, i.e., `base_plus_offset`, supported by LDR/STR instructions. But for certain data width, not all immediates can be encoded in the instruction field of LDR/STR[1]. The ranges are different as data widths vary. For example, when we try to load a value of long type at offset of `1030`, the address expression is `(AddP (DecodeN base) 1030)`. Before the patch, the expression was matching with `operand indOffIN()`. But, for 64-bit LDR/STR, signed immediate byte offset must be in the range -256 to 255 or positive immediate byte offset must be a multiple of 8 in the range 0 to 32760[2]. `1030` can't be encoded in the instruction field. So, after matching, when we do checking for instruction encoding, the assertion would fail. In this patch, we're going to filter out invalid immediates when deciding if current addressing mode can be matched as `base_plus_offset`. We introduce `indOffIN4/indOffLN4` and `indOffIN8/indOffLN8` for 32-bit data type and 64-bit data type separately in the patch. E.g., for `memory4`, we remove the generic `indOffIN/indOffLN`, which matches wrong unscaled immediate range, and replace them with `indOffIN4/indOffLN4` instead. Since 8-bit and 16-bit LDR/STR instructions also support the unscaled decoding pattern, we add the addressing mode in the lists of `memory1` and `memory2` by introducing `indOffIN1/indOffLN1` and `indOffIN2/indOffLN2`. We also remove unused operands `indOffI/indOffl/indOffIN/indOffLN` to avoid misuse. Tier 1-3 passed on aarch64. [1] https://github.com/openjdk/jdk/blob/8db7bad992a0f31de9c7e00c2657c18670539102/src/hotspot/cpu/aarch64/assembler_aarch64.inline.hpp#L33 [2] https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions/LDR--immediate---Load-Register--immediate--?lang=en
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Fei Gao
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test/hotspot/jtreg/compiler/c2/aarch64/TestUnalignedAccessCompressedOops.java
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| /* | ||
| * Copyright (c) 2023, Arm Limited. All rights reserved. | ||
| * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | ||
| * | ||
| * This code is free software; you can redistribute it and/or modify it | ||
| * under the terms of the GNU General Public License version 2 only, as | ||
| * published by the Free Software Foundation. | ||
| * | ||
| * This code is distributed in the hope that it will be useful, but WITHOUT | ||
| * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
| * version 2 for more details (a copy is included in the LICENSE file that | ||
| * accompanied this code). | ||
| * | ||
| * You should have received a copy of the GNU General Public License version | ||
| * 2 along with this work; if not, write to the Free Software Foundation, | ||
| * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | ||
| * | ||
| * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA | ||
| * or visit www.oracle.com if you need additional information or have any | ||
| * questions. | ||
| */ | ||
|
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| package compiler.c2.aarch64; | ||
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| import jdk.internal.misc.Unsafe; | ||
| import jdk.test.lib.Asserts; | ||
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| /** | ||
| * @test TestUnalignedAccessCompressedOops | ||
| * @summary AArch64: C2 compilation hits offset_ok_for_immed: assert "c2 compiler bug". | ||
| * @bug 8319690 | ||
| * @library /test/lib | ||
| * @modules java.base/jdk.internal.misc | ||
| * @requires os.arch=="aarch64" & vm.compiler2.enabled | ||
| * @run main/othervm compiler.c2.aarch64.TestUnalignedAccessCompressedOops | ||
| * @run main/othervm -Xcomp -XX:-TieredCompilation -Xmx1g | ||
| * -XX:CompileCommand=compileonly,compiler.c2.aarch64.TestUnalignedAccessCompressedOops*::<clinit> | ||
| * compiler.c2.aarch64.TestUnalignedAccessCompressedOops | ||
| */ | ||
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| public class TestUnalignedAccessCompressedOops { | ||
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| public static final int LEN = 2040; | ||
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| static final Unsafe UNSAFE = Unsafe.getUnsafe(); | ||
| static void sink(int x) {} | ||
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| public static long lseed = 1; | ||
| public static int iseed = 2; | ||
| public static short sseed = 3; | ||
| public static byte bseed = 4; | ||
| public static long lres = lseed; | ||
| public static int ires = iseed; | ||
| public static short sres = sseed; | ||
| public static byte bres = bseed; | ||
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| public static class TestLong { | ||
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| private static final byte[] BYTES = new byte[LEN]; | ||
| private static final long rawdata = 0xbeef; | ||
| private static final long data; | ||
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| static { | ||
| sink(2); | ||
| // Signed immediate byte offset: range -256 to 255 | ||
| // Positive immediate byte offset: a multiple of 8 in the range 0 to 32760 | ||
| // Other immediate byte offsets can't be encoded in the instruction field. | ||
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| // 1030 can't be encoded as "base + offset" mode into the instruction field. | ||
| UNSAFE.putLongUnaligned(BYTES, 1030, rawdata); | ||
| lres += UNSAFE.getLongUnaligned(BYTES, 1030); | ||
| // 127 can be encoded into simm9 field. | ||
| UNSAFE.putLongUnaligned(BYTES, 127, lres); | ||
| lres += UNSAFE.getLongUnaligned(BYTES, 127); | ||
| // 1096 can be encoded into uimm12 field. | ||
| UNSAFE.putLongUnaligned(BYTES, 1096, lres); | ||
| data = UNSAFE.getLongUnaligned(BYTES, 1096); | ||
| } | ||
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| } | ||
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| public static class TestInt { | ||
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| private static final byte[] BYTES = new byte[LEN]; | ||
| private static final int rawdata = 0xbeef; | ||
| private static final int data; | ||
| static { | ||
| sink(2); | ||
| // Signed immediate byte offset: range -256 to 255 | ||
| // Positive immediate byte offset, a multiple of 4 in the range 0 to 16380 | ||
| // Other immediate byte offsets can't be encoded in the instruction field. | ||
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| // 274 can't be encoded as "base + offset" mode into the instruction field. | ||
| UNSAFE.putIntUnaligned(BYTES, 274, rawdata); | ||
| ires += UNSAFE.getIntUnaligned(BYTES, 274); | ||
| // 255 can be encoded into simm9 field. | ||
| UNSAFE.putIntUnaligned(BYTES, 255, ires); | ||
| ires += UNSAFE.getIntUnaligned(BYTES, 255); | ||
| // 528 can be encoded into uimm12 field. | ||
| UNSAFE.putIntUnaligned(BYTES, 528, ires); | ||
| data = UNSAFE.getIntUnaligned(BYTES, 528); | ||
| } | ||
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| } | ||
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| public static class TestShort { | ||
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| private static final byte[] BYTES = new byte[LEN]; | ||
| private static final short rawdata = (short)0xbeef; | ||
| private static final short data; | ||
| static { | ||
| sink(2); | ||
| // Signed immediate byte offset: range -256 to 255 | ||
| // Positive immediate byte offset: a multiple of 2 in the range 0 to 8190 | ||
| // Other immediate byte offsets can't be encoded in the instruction field. | ||
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| // 257 can't be encoded as "base + offset" mode into the instruction field. | ||
| UNSAFE.putShortUnaligned(BYTES, 257, rawdata); | ||
| sres = (short) (sres + UNSAFE.getShortUnaligned(BYTES, 257)); | ||
| // 253 can be encoded into simm9 field. | ||
| UNSAFE.putShortUnaligned(BYTES, 253, sres); | ||
| sres = (short) (sres + UNSAFE.getShortUnaligned(BYTES, 253)); | ||
| // 272 can be encoded into uimm12 field. | ||
| UNSAFE.putShortUnaligned(BYTES, 272, sres); | ||
| data = UNSAFE.getShortUnaligned(BYTES, 272); | ||
| } | ||
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| } | ||
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| public static class TestByte { | ||
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| private static final byte[] BYTES = new byte[LEN]; | ||
| private static final byte rawdata = (byte)0x3f; | ||
| private static final byte data; | ||
| static { | ||
| sink(2); | ||
| // Signed immediate byte offset: range -256 to 255 | ||
| // Positive immediate byte offset: range 0 to 4095 | ||
| // Other immediate byte offsets can't be encoded in the instruction field. | ||
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| // 272 can be encoded into simm9 field. | ||
| UNSAFE.putByte(BYTES, 272, rawdata); | ||
| bres = (byte) (bres + UNSAFE.getByte(BYTES, 272)); | ||
| // 53 can be encoded into simm9 field. | ||
| UNSAFE.putByte(BYTES, 53, bres); | ||
| bres = (byte) (bres + UNSAFE.getByte(BYTES, 53)); | ||
| // 1027 can be encoded into uimm12 field. | ||
| UNSAFE.putByte(BYTES, 1027, bres); | ||
| data = UNSAFE.getByte(BYTES, 1027); | ||
| } | ||
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| } | ||
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| static void test() { | ||
| TestLong ta = new TestLong(); | ||
| Asserts.assertEquals(ta.data, (ta.rawdata + lseed) * 2, "putUnaligned long failed!"); | ||
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| TestInt tb = new TestInt(); | ||
| Asserts.assertEquals(tb.data, (tb.rawdata + iseed) * 2, "putUnaligned int failed!"); | ||
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| TestShort tc = new TestShort(); | ||
| Asserts.assertEquals(tc.data, (short) (((short) (tc.rawdata + sseed)) * 2), "putUnaligned short failed!"); | ||
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| TestByte td = new TestByte(); | ||
| Asserts.assertEquals(td.data, (byte) (((byte) (td.rawdata + bseed)) * 2), "put byte failed!"); | ||
| } | ||
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| public static void main(String[] strArr) { | ||
| test(); | ||
| } | ||
| } |