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feat(dispatch): add tsingmicro txda backend for vllm 0.24.0 - #421

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tengqm wants to merge 7 commits into
flagos-ai:mainfrom
tengqm:port/txda-tsingmicro
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feat(dispatch): add tsingmicro txda backend for vllm 0.24.0#421
tengqm wants to merge 7 commits into
flagos-ai:mainfrom
tengqm:port/txda-tsingmicro

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@tengqm tengqm commented Aug 30, 2026

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Summary

Port the tsingmicro (TX8110) txda backend to vllm 0.24.0 and fix the KV-cache write path that vLLM 0.24's Attention.forward requires.

Changes

  • KV-cache write fix (cross-platform): vLLM 0.24 calls unified_kv_cache_update only when the backend's forward_includes_kv_cache_update is False. AttentionFLBackend inherited vLLM's True default, so the KV cache was never written and forward read an empty cache — silent garbage on every platform using the flag_gems attention backend. Set it to False. (The fix existed on the release/0.2 lineage but never reached current main.)
  • TxdaSDPAAttentionBackend: flag_gems flash_attn_varlen_func / reshape_and_cache_flash compute silently wrong values on TX8110. This backend reuses the flag_gems KV layout / block table / slot mapping, computes attention with torch SDPA, and writes the cache via plain indexing with a slot_mapping >= 0 guard against padded slots.
  • Txda platform + dispatch: txda device in platform.py, VENDOR_DEVICE_MAP, tsingmicro.yaml config, reference fused_moe impl (flag_gems moe failed to import on this stack), rms_norm/rotary routed to reference impls.

Validation

  • tsingmicro TX8110, runtime flagos-runtime-tsingmicro-tsm260610:2.1.2, Qwen3-4B, LLM API (dtype=bfloat16, enforce_eager=True, max_model_len=1024, gpu_memory_utilization=0.9, tensor_parallel_size=1, seed=0).
  • Both compiler paths E2E pass, 5/5 prompts correct and identical across paths: France→" Paris. The capital", Germany→" Berlin. The capital", 2+2→" 4, ", ocean→" Pacific Ocean, which", Japan (seed 7, max_tokens 8)→" Tokyo, but the government is in Kyoto".
    • F path (flagtree 0.6.1+tsingmicro3.3): DONE 1888.2s EXIT=0
    • T path (vendor triton 3.6.0.post…): DONE 2620.8s EXIT=0
  • KV cache verified byte-identical between write and read on both paths; padded slots (slot_mapping=-1) skipped, generation slots (16/64/…) written normally.

Follow-up

  • MLA path on txda is unverified; still points at the flag_gems MLA backend.
  • attention_backend: [flagos, vendor] — flagos raises on TX8110 (no CUDA), falls back to vendor.txda.

This PR was written in part with the assistance of generative AI.

@github-actions github-actions Bot added the core label Aug 30, 2026
counts.scatter_add_(0, expert_of_sorted, ones) # bincount absent on txda
aligned = ((counts + block_size - 1) // block_size) * block_size
offsets = aligned.cumsum(0, dtype=torch.int64)
starts = offsets - aligned
tengqm added 7 commits August 31, 2026 20:32
Port the tsingmicro (txda) backend from 8236c0a onto main:
- utils.py: VENDOR_DEVICE_MAP tsingmicro -> txda, DeviceInfo.supported_device
- platform.py: is_pin_memory_available + get_device_capability txda branches
- dispatch/backends/vendor/txda: attention_backend-only registration
  (8236c0a registered 4 ops that are not on the Backend ABC and were
  silently dropped)

Basing on main drops the 8236c0a router import
(vllm.model_executor.layers.fused_moe.rocm_aiter_fused_moe) in favor of the
0.24.0 paths (vllm._aiter_ops / fused_moe.experts.rocm_aiter_moe).
- model_runner: use a CPU generator for txda seeded sampling, since
  torch.Generator does not support the txda device
- platform: map the txda device to the gloo distributed backend
- graph: select torch.txda.TXDAGraph for graph capture on txda
- config: add tsingmicro.yaml flagos blacklist (masked_fill/to_copy/copy
  triton kernels hang on TX8110 in the top-k sampler path)
User: txda uses tccl rather than gloo for communication layer.
flagos attention_backend is CUDA-gated and raises RuntimeError on txda;
reference backend registration is broken upstream (ReferenceBackend lacks
moe_align_block_size/moe_sum/topk_softmax/grouped_topk) so [flagos,
reference] yields exactly one candidate that always fails. vendor.txda
returns AttentionFLBackend (flag_gems), the intended txda impl.
register_builtins eagerly resolved backend.moe_align_block_size / moe_sum /
topk_softmax / grouped_topk, none of which exist on ReferenceBackend. The
AttributeError aborted the whole registration, so the 'reference' token
matched no impls on any platform.

Add the four missing MoE reference implementations (impl/fused_moe.py, exact
flag_gems semantics) and make registration per-op fault tolerant: a missing
method logs a warning and skips just that op instead of aborting everything.
flag_gems kernels compiled with flagtree compute silently wrong on TX8110
(rms_norm maxrel ~7228.7, rotary ~768) while reference.torch is accurate
(maxrel < 1%). Route rms_norm and rotary_embedding to reference first on
tsingmicro; keep silu_and_mul and attention_backend on flagos.
vLLM 0.24 calls unified_kv_cache_update only when the backend flag is
False; AttentionFLBackend inherited the True default, so the KV cache was
never written and forward read an empty cache (garbage on every flag_gems
attention platform).

Add TxdaSDPAAttentionBackend: flag_gems flash_attn kernels compute wrong
values on TX8110, so compute attention with torch SDPA instead, reusing
the flag_gems KV layout/metadata. Writes the cache via plain indexing with
a slot_mapping >= 0 guard.
@tengqm
tengqm force-pushed the port/txda-tsingmicro branch from 57b15c7 to bd010ce Compare August 31, 2026 12:32
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