core: memory alignment feature addition #9174
Merged
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This PR adds a new feature flag named
FLB_ENFORCE_ALIGNMENT
which can be used to ensure that when decoding the timestamp field from a record fluent-bit ensures that the memory access operation is aligned which is not the case normally due to how the msgpack wire protocol packsext
types.While it's clear that exchanging one read operation for seven reads and a few more writes is undesirable to say the least, this is the only way I found to ensure that the output machine code was not tampered with in any of the compiler and architecture combinations.
There are two alternative implementations for this function using either two individual
DWORD
reads :Or one
QWORD
read (which is translated to one "load pair of DWORDs" operation in ARMv7) :However, both of these alternatives could exceed the bounds of a memory page given the "right" pointer resulting in a segment violation and more importantly, the code is way less straightforward and thus error prone with questionable (if any) performance gains in return.
I wanted to add this context so anyone who takes the time to review these changes or tries to improve the code in the future has enough information to avoid wasting time, getting frustrated or worse causing a regression.
Two additional useful pieces of information :