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@fpgasystems

FPGA @ Systems Group, ETH Zurich

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  1. fpga-network-stack fpga-network-stack Public

    Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

    C++ 760 272

  2. spooNN spooNN Public

    FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)

    Jupyter Notebook 261 73

  3. Coyote Coyote Public

    Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.

    SystemVerilog 222 69

  4. Vitis_with_100Gbps_TCP-IP Vitis_with_100Gbps_TCP-IP Public

    100 Gbps TCP/IP stack for Vitis shells

    C++ 185 75

  5. caribou caribou Public

    Caribou: Distributed Smart Storage built with FPGAs

    Verilog 64 21

  6. davos davos Public

    Distributed Accelerator OS

    SystemVerilog 60 28

Repositories

Showing 10 of 47 repositories
  • hdev Public

    HACC development.

    fpgasystems/hdev’s past year of commit activity
    C 0 MIT 0 0 0 Updated Nov 28, 2024
  • Coyote Public

    Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.

    fpgasystems/Coyote’s past year of commit activity
    SystemVerilog 222 MIT 69 13 (4 issues need help) 0 Updated Nov 27, 2024
  • hacc Public

    ETHZ Heterogeneous Accelerated Compute Cluster.

    fpgasystems/hacc’s past year of commit activity
    29 MIT 1 0 0 Updated Nov 24, 2024
  • sgrt Public

    Systems Group RunTime.

    fpgasystems/sgrt’s past year of commit activity
    C 1 MIT 0 0 0 Updated Nov 22, 2024
  • hdev_install Public

    Systems Group RunTime Installation.

    fpgasystems/hdev_install’s past year of commit activity
    Shell 0 MIT 0 0 0 Updated Nov 22, 2024
  • fpga-network-stack Public

    Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

    fpgasystems/fpga-network-stack’s past year of commit activity
    C++ 760 BSD-3-Clause 272 21 2 Updated Nov 17, 2024
  • AMD-OHC-2024 Public

    Our contribution to the AMD Open Hardware Contest: A ML-based Deep Packet Inspection for RDMA-networking on FPGAs

    fpgasystems/AMD-OHC-2024’s past year of commit activity
    Verilog 2 0 0 0 Updated Oct 7, 2024
  • dedup Public
    fpgasystems/dedup’s past year of commit activity
    Scala 0 1 0 0 Updated Sep 12, 2024
  • fpgasystems/Chameleon-RAG-Acceleration’s past year of commit activity
    C++ 0 0 0 0 Updated Sep 10, 2024
  • RecoNIC_RDMA_port Public Forked from romarx/RecoNIC

    RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.

    fpgasystems/RecoNIC_RDMA_port’s past year of commit activity
    SystemVerilog 0 MIT 27 0 0 Updated Sep 5, 2024