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[Variant] Add DISCO F303VC
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Supersede stm32duino#1238

Signed-off-by: dnandha <[email protected]>
Co-authored-by: Alexandre Bourdiol <[email protected]>
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2 people authored and fpistm committed Mar 29, 2021
1 parent d8ce03d commit 379b0bb
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2 changes: 2 additions & 0 deletions README.md
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Expand Up @@ -134,6 +134,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :green_heart: | STM32F030R8 | [32F0308DISCOVERY](http://www.st.com/en/evaluation-tools/32f0308discovery.html) | *1.3.0* | |
| :green_heart: | STM32F072RB | [32F072BDISCOVERY](https://www.st.com/en/evaluation-tools/32f072bdiscovery.html) | *1.5.0* | |
| :green_heart: | STM32F100RB | [STM32VLDISCOVERY](https://www.st.com/en/evaluation-tools/stm32vldiscovery.html) | 0.2.1 | |
| :yellow_heart: | STM32F303VC | [STM32F3DISCOVERY](https://www.st.com/en/evaluation-tools/stm32f3discovery.html) | **2.0.0** | |
| :green_heart: | STM32F407VG | [STM32F407G-DISC1](http://www.st.com/en/evaluation-tools/stm32f4discovery.html) | *0.1.0* | |
| :green_heart: | STM32F746NG | [STM32F746G-DISCOVERY](http://www.st.com/en/evaluation-tools/32f746gdiscovery.html) | *0.1.0* | |
| :green_heart: | STM32G031J6 | [STM32G0316-DISCO](https://www.st.com/en/evaluation-tools/stm32g0316-disco.html) | *1.9.0* | |
Expand Down Expand Up @@ -205,6 +206,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :green_heart: | STM32F303CC | [RobotDyn Black Pill](https://stm32-base.org/boards/STM32F303CCT6-RobotDyn-Black-Pill) | *1.6.1* | [More info](https://robotdyn.com/catalog/development-boards/stm-boards-and-shields.html) |
| :yellow_heart: | STM32F303K6<br>STM32F303K8 | Generic Board | **2.0.0** | |
| :yellow_heart: | STM32F303RD<br>STM32F303RE | Generic Board | **2.0.0** | |
| :yellow_heart: | STM32F303VBT<br>STM32F303VCT | Generic Board | **2.0.0** | |
| :yellow_heart: | STM32F334K4<br>STM32F334K6<br>STM32F334K8 | Generic Board | **2.0.0** | |

### Generic STM32F4 boards
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29 changes: 29 additions & 0 deletions boards.txt
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Expand Up @@ -663,6 +663,19 @@ Disco.menu.pnum.DISCO_F100RB.build.product_line=STM32F100xB
Disco.menu.pnum.DISCO_F100RB.build.variant=STM32F1xx/DISCO_F100RB
Disco.menu.pnum.DISCO_F100RB.build.cmsis_lib_gcc=arm_cortexM3l_math

# DISCO_F303VC board
Disco.menu.pnum.DISCO_F303VC=STM32F3-DISCOVERY
Disco.menu.pnum.DISCO_F303VC.node=DIS_F303VC
Disco.menu.pnum.DISCO_F303VC.upload.maximum_size=262144
Disco.menu.pnum.DISCO_F303VC.upload.maximum_data_size=40960
Disco.menu.pnum.DISCO_F303VC.build.mcu=cortex-m4
Disco.menu.pnum.DISCO_F303VC.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
Disco.menu.pnum.DISCO_F303VC.build.board=DISCO_F303VC
Disco.menu.pnum.DISCO_F303VC.build.series=STM32F3xx
Disco.menu.pnum.DISCO_F303VC.build.product_line=STM32F303xC
Disco.menu.pnum.DISCO_F303VC.build.variant=STM32F3xx/F303V(B-C)Tx
Disco.menu.pnum.DISCO_F303VC.build.cmsis_lib_gcc=arm_cortexM4lf_math

# DISCO_F407VG board
Disco.menu.pnum.DISCO_F407VG=STM32F407G-DISC1
Disco.menu.pnum.DISCO_F407VG.node=DIS_F407VG
Expand Down Expand Up @@ -1616,6 +1629,22 @@ GenF3.menu.pnum.GENERIC_F303RETX.build.board=GENERIC_F303RETX
GenF3.menu.pnum.GENERIC_F303RETX.build.product_line=STM32F303xE
GenF3.menu.pnum.GENERIC_F303RETX.build.variant=STM32F3xx/F303R(D-E)Tx

# Generic F303VBTx
GenF3.menu.pnum.GENERIC_F303VBTX=Generic F303VBTx
GenF3.menu.pnum.GENERIC_F303VBTX.upload.maximum_size=131072
GenF3.menu.pnum.GENERIC_F303VBTX.upload.maximum_data_size=32768
GenF3.menu.pnum.GENERIC_F303VBTX.build.board=GENERIC_F303VBTX
GenF3.menu.pnum.GENERIC_F303VBTX.build.product_line=STM32F303xC
GenF3.menu.pnum.GENERIC_F303VBTX.build.variant=STM32F3xx/F303V(B-C)Tx

# Generic F303VCTx
GenF3.menu.pnum.GENERIC_F303VCTX=Generic F303VCTx
GenF3.menu.pnum.GENERIC_F303VCTX.upload.maximum_size=262144
GenF3.menu.pnum.GENERIC_F303VCTX.upload.maximum_data_size=40960
GenF3.menu.pnum.GENERIC_F303VCTX.build.board=GENERIC_F303VCTX
GenF3.menu.pnum.GENERIC_F303VCTX.build.product_line=STM32F303xC
GenF3.menu.pnum.GENERIC_F303VCTX.build.variant=STM32F3xx/F303V(B-C)Tx

# Generic F334K4Tx
GenF3.menu.pnum.GENERIC_F334K4TX=Generic F334K4Tx
GenF3.menu.pnum.GENERIC_F334K4TX.upload.maximum_size=16384
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67 changes: 65 additions & 2 deletions variants/STM32F3xx/F303V(B-C)Tx/generic_clock.c
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Expand Up @@ -19,9 +19,72 @@
* @retval None
*/
WEAK void SystemClock_Config(void)
#if defined(USBCON)
{
/* SystemClock_Config can be generated by STM32CubeMX */
#warning "SystemClock_Config() is empty. Default clock at reset is used."
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};

/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
Error_Handler();
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
Error_Handler();
}
}
#else
{
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};

/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
Error_Handler();
}
}
#endif /* USBCON */

#endif /* ARDUINO_GENERIC_* */
179 changes: 179 additions & 0 deletions variants/STM32F3xx/F303V(B-C)Tx/ldscript.ld
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@@ -0,0 +1,179 @@
/**
******************************************************************************
* @file LinkerScript.ld
* @author Auto-generated by STM32CubeIDE
* @brief Linker script for STM32F303VCTx Device from STM32F3 series
* 256Kbytes FLASH
* 8Kbytes CCMRAM
* 40Kbytes RAM
*
* Set heap size, stack size and stack location according
* to application requirements.
*
* Set memory bank area and size if external memory is used
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/

/* Entry Point */
ENTRY(Reset_Handler)

/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */

_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */

/* Memories definition */
MEMORY
{
CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 8K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
}

/* Sections */
SECTIONS
{
/* The startup code into "FLASH" Rom type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH

/* The program code and other data into "FLASH" Rom type memory */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)

KEEP (*(.init))
KEEP (*(.fini))

. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH

/* Constant data into "FLASH" Rom type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH

.ARM.extab : {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH

.ARM : {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
} >FLASH

.preinit_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
} >FLASH

.init_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
} >FLASH

.fini_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
} >FLASH

/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);

/* Initialized data sections into "RAM" Ram type memory */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
*(.RamFunc) /* .RamFunc sections */
*(.RamFunc*) /* .RamFunc* sections */

. = ALIGN(4);
_edata = .; /* define a global symbol at data end */

} >RAM AT> FLASH

/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)

. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM

/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM

/* Remove information from the compiler libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}

.ARM.attributes 0 : { *(.ARM.attributes) }
}
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