docs(readme): TRI-27 as Trinity Core Kernel (#411)

README.md

@@ -49,6 +49,25 @@
 
 ---
 
+## TRI-27 — Trinity Kernel
+
+**TRI-27 is the ternary computing kernel** that executes all Trinity workloads:
+
+| Component | Value |
+|-----------|-------|
+| **Registers** | 27×32-bit (t0-t26) = 3 banks × 9 (Coptic alphabet) |
+| **Opcodes** | 36 — arithmetic, logic, control, ternary, sacred |
+| **Memory** | 64KB byte-addressable |
+| **Targets** | Zig CPU emulator + Verilog FPGA |
+
+```
+φ² + 1/φ² = 3 → 3^27 = 7.6 trillion states (ternary completeness)
+```
+
+[Full TRI-27 Documentation](docs/tri27/README.md) | [ISA Reference](src/tri-lang/emu/specs/tri27_isa.md)
+
+---
+
 ## For Scientific Collaborators
 
 **TRINITY is a unified research framework** connecting fundamental physics through a single mathematical identity: `φ² + φ⁻² = 3`. From this root, candidate formulas for gravitational constant **G**, consciousness threshold **C**, temporal perception **t_present**, and fermion generations **N_gen** are derived.

docs/ARCHITECTURE.md

@@ -33,6 +33,25 @@ Strand III (Language + Hardware)
 
 ---
 
+## TRI-27 Kernel — Central Execution Engine
+
+**TRI-27 — тернарное вычислительное ядро**, которое выполняет все рабочие нагрузки Trinity:
+
+| Компонент | Значение |
+|------------|---------|
+| **Регистры** | 27×32-bit (t0-t26) = 3 банка × 9 (коптский алфавит) |
+| **Опкоды** | 36 — арифметика, логика, управление, тернарные, священные |
+| **Память** | 64KB байтоадресуемая |
+| **Цели** | Zig эмулятор CPU + Verilog FPGA |
+
+```
+φ² + 1/φ² = 3 → 3^27 = 7.6 триллионов состояний (тернарная полнота)
+```
+
+[Полная документация TRI-27](docs/tri27/README.md)
+
+---
+
 ## Strand I — Mathematical Foundation
 
 ### Роль

docs/tri27/README.md

@@ -10,6 +10,33 @@
 
 TRI‑27 — тритный (ternary) RISC процессор с 27 тритными регистрами и полным стеком разработки: от ISA до FPGA.
 
+### In Trinity S³AI
+
+**TRI-27 is the Central Execution Engine** of Trinity S³AI:
+
+| Aspect | Role in Trinity |
+|--------|-----------------|
+| **Kernel** | Executes all Trinity workloads — from VSA operations to HSLM training |
+| **φ-Structure** | 27 registers = 3³ reflects `φ² + 1/φ² = 3` |
+| **Strand III** | Language & Hardware Bridge between math (Strand I) and brain (Strand II) |
+| **Dual Target** | Zig CPU emulator for development + Verilog FPGA for production |
+
+```
+Trinity S³AI Stack:
+┌─────────────────────────────────────────┐
+│  Strand I: Math (φ² + 1/φ² = 3)        │
+├─────────────────────────────────────────┤
+│  Strand II: Brain (Cognitive Arch)     │
+├─────────────────────────────────────────┤
+│  Strand III: TRI-27 Kernel ← YOU ARE   │
+│    • 27×32-bit registers (t0-t26)      │
+│    • 36 opcodes (arith, logic, ternary) │
+│    • Zig CPU + Verilog FPGA targets     │
+└─────────────────────────────────────────┘
+```
+
+[Back to Trinity Architecture](../ARCHITECTURE.md) | [Trinity S³AI Architecture](../trinity_s3ai_architecture.md)
+
 ### Architecture
 
 ```

docs/trinity_s3ai_architecture.md

@@ -6,6 +6,39 @@
 
 ---
 
+## TRI-27 — The Trinity Kernel
+
+**TRI-27 is the ternary computing kernel** at the heart of Trinity S³AI:
+
+| Component | Value |
+|-----------|-------|
+| **Registers** | 27×32-bit (t0-t26) = 3 banks × 9 (Coptic alphabet) |
+| **Opcodes** | 36 — arithmetic, logic, control, ternary, sacred |
+| **Memory** | 64KB byte-addressable |
+| **Targets** | Zig CPU emulator + Verilog FPGA |
+
+```
+┌─────────────────────────────────────────────────────────────┐
+│                  TRI-27 TERNARY KERNEL                      │
+├─────────────────────────────────────────────────────────────┤
+│  Registers: 27× (t0-t26) = 3 banks × 9                      │
+│  Opcodes: 36 (arith, logic, ctrl, ternary, sacred)          │
+│  Memory: 64KB byte-addressable                               │
+│  φ² + 1/φ² = 3 → 3^27 = 7.6T states (ternary completeness)  │
+└─────────────────────────────────────────────────────────────┘
+```
+
+### Why TRI-27 is the Kernel
+
+1. **φ-Structured**: 27 registers = 3³, directly reflecting `φ² + 1/φ² = 3`
+2. **Ternary Complete**: 3^27 states = maximum information density
+3. **Dual Target**: Zig software emulation + Verilog FPGA synthesis
+4. **Bridge Layer**: Connects Trinity math (Strand I) to hardware (Strand III)
+
+[Full TRI-27 Documentation](docs/tri27/README.md)
+
+---
+
 ## 🧠 Level 1: Upper Layer (Brand & Science Framework)
 
 ### Scientific Foundation