Fix cpu.md misinfo/typo #23
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The ARM7TDMI has 37 registers. You can reference the technical manual (Section 2.6) for more information. You can also count out the registers already listed.
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Is this information even relevant? I think we should just remove the count because "17 registers" doesn't really give any useful information. One of them is the program counter, another one the stack pointer, another one the link register, another one is the CPU status register. Even though the SP is only assigned by convention in ARM mode, it is assigned to r13 in Thumb mode. So basically you have r0-r12, and 4 registers that have specific purposes. Adding them all doesn't seem particularly useful. |
It should be reworked entirely because even 17 isn't technically right. It's between 17 and 18 depending on the processor mode. I would go as far as to say that the information listed isn't descriptive enough. "The processor has a total of 37 registers, but it can only access 17 or 18 at any one point. The remaining registers are banked depending on the processor mode. The first 8 registers are the low registers (r0-r7), they are for general-use and remain the same regardless of processor mode. The next 8 registers are the high registers and can be swapped with the banked registers. Within the high registers, the first 5 (r8-r12) are for general-use. The remaining 3 represent the Stack Pointer (r13), the Link Register (r14), and the Program Counter (r15) respectively. The last 2 registers are the CPSR and SPSR. The CPSR is static and can be accessed in any processor mode, while the SPSR can be swapped with banked registers and is inaccessible by the User and System processor modes." A little wordy but I think the minor details are important here. ARM also just has a chart you could probably use or link to. Edit: Oh and obviously also include the stuff I forgot to mention like the 3-stage pipeline. Please rework as you see fit, this is just how I would personally find it most comprehensive. |
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Yeah I agree it's not a particularly useful information.. @AidenBeresford could you update the PR (or open a new one) with your new suggestion? |
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We could say "16 working registers" to make it factual and accurate. You can perform work on r0 to r15 just fine. Yeah, I wouldn't say "16 generic-purpose registers", as while PC may be "generic-purpose" under the hood, I would not write to it. It also requires specific offset for each instruction (depending on where in the pipeline PC is accessed), which makes it not so generic purpose. On the other hand "16 working registers", however weird it sounds, is technically accurate. You can perform work on them, mostly freely. Nobody says you can't use SP or LR, those limitations are mostly "contractual" (besides BL, and PUSH/POP and ADD/SUB SP in Thumb mode). |
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"16 working registers" is a lie because the PC isn't a regular register. In practice, if I'm writing code, at most I have 13 registers, a stack pointer, a link register, and the PC. You can reuse LR for other things because you can restore it from the stack if you want, but you will still need to use the r13 register as SP. If you're writing an emulator/assembler, maybe it makes sense to think about the registers as a 16 register bank. As a developer, it's more useful to think that you have 13 registers to do useful work. So yeah, I think that giving a register count isn't very useful. I would add an image like this one and call it a day: 
https://www.researchgate.net/figure/Banked-registers-of-ARM-CPU_fig6_29602641 |
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By "working registers" I meant that you could directly work on them, without having to use special ops (so, CPSR and SPSR don't count). I would not consider PC as "general-purpose" even if it is, hence I used "working regstier". You can address PC directly, even if it's useless. |
The ARM7TDMI has 37 registers. You can reference the technical manual (Section 2.6) for more information. You can also count out the registers already listed.