Fix diodes and bjts #5
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Corrected the limits on device special_pfet_pass to cover a device found in the dual-port SRAM cell.
…gle sky130_fd_pr repository (PR#3). Also added the verilog-A models from the original pull request on the Google sky130_fd_pr repository (PR#4). The continuous models contain not only the files fro the pull request, but also the parameter files for the discrete models that are not part of the continuous device set, with the references to models that are now in the continuous device set removed. This results in a model library with a mixture of continuous and discrete device models which is called "combined_models" and that is more complete than the original pull request (combining the two sets of models is not a trivial task that can be done by a script).
Development 07/10
…ocess and mismatch statistics conversion, which I want to do in a single commit.
Ran open_pdks patches and fix scripts.
since the SRAM cells do not use pFETs as pass transistors and the device in question is the complement of "nfet_latch" and should be called "pfet_latch". This name change has been made throughout the repository, leaving only a subcircuit definition for "pfet_pass" that instantiates "pfet_latch", for backwards compatibility with legacy netlists.
Changed "pfet_pass" to "pfet_latch" everywhere.
Applied mismatch and process parameter handling to the files (spectre -> ngspice conversion). Corrected an issue that had been in open_pdks previously where parameters spread across both cells/ and models/ were not handled. Removed the incorrect PNP layout and moved the 11V NPN layout to the "RF" version. For both devices, the models now exist only under the device name, and the layouts exist only under the name with "rf", such that the layout subcircuit names do not shadow the device model subcircuit names.
Monte carlo update and other fixes.
…r.spice; there is a ".param" line with nothing else on the line. Xyce at least considers this an error. Thanks to Sam Crow for reporting the issue.
Corrected an error in sky130_fd_pr__nfet_g5v0d16v0__ss_discrete.corne…
which is to put the bipolar "fast" with FET "ff", bipolar "slow" with FET "ss", and bipolar "typical" with FET "tt", "fs", and "sf". The corner files were updated to include the proper NPN corner parameter files, and the base bipolar model file was removed from the corner parameter file since it is already include from "all.spice". The PNP "model.spice" file was remove from the models/ directory because it is unused (only includes files that are already included from "all.spice").
Corrected the NPN corner includes
of parameter names that collide with device names, and was missed in the prior search that caught most (I hope!) of those errors. Fixed in model file montecarlo.spice.
Corrected parameter name "nfet_20v0_nvt_iso" in montecarlo.spice
monte carlo parameter file in the combined models, which allows monte carlo simulations to run using the combined models. Otherwise ngspice throws missing parameter errors.
Copied missing monte carlo parameters from discrete to combined models
bipolar transistor subcircuit definitions to "sqrt(mult)", as in ngspice, the subcircuit "m" parameter cannot be used in model equations.
Corrected "sqrt(m)" to "sqrt(mult)" in continuous-range bipolar models.
ngspice compatibility.
Changed "temp" to "temper" in the continuous pwell resistor model
…ned models, which had been left pointing at the relative path for the *installed* PDK and not for the PDK *source*. This does not cause a failure in the installed PDK, but it does prevent simulating/testing from the PDK source. Thanks to Dietmar Warning for pointing out this issue.
the cell directory name in the cap_vpp_only_p models, which was a mistake made in the previous commit.
Corrected the include lines for the discrete model files in the combined models
"_fingercap" and "_wafflecap" extensions on some vpp_cap devices got added to the referenced include directory, which does not have the suffix. There was also a similar problem with an incorrect include directory in the original discrete models which had not been noticed before. Thanks again to Dietmar Warning for the bug report and thorough testing.
Additional model include path fixes related to yesterday's commit.
…than the minimum gate width for diffusion. The minimum gate width is 0.42um and is the limit of the continuous nFET and pFET models. But the HD standard cell library uses some nfet_01v8 devices with 0.36 and 0.39um width gates, and some pfet_01v8_hvt devices with 0.36um width gates. Because each of these devices has its own specific characterized model in the original discrete models, the three discrete models were ported to the combined models set. Since they use the same model names as the continuous devices, the models were renamed to "sky130_fd_pr__special_nfet_01v8" and "sky130_fd_pr__special_pfet_01v8_hvt", using the same format as was used on similarly under-sized devices in the SRAM. This requires changing the way the devices are extracted, and requires chaning the 200+ device instances in the HD library standard cell SPICE and CDL. To keep the change to the standard cells from breaking the original discrete device models, the new device names were instantiated in the original discrete device models as new subcircuits that call the original subcircuit (without the "special_" prefix).
Added the 0.36 and 0.39um width nFET and pFET devices to the combined models.
to be forwards-compatible with the combined models. Removed the substrate terminal from the PNP devices in the continuous models to make them compatible with the original PNP models, and because the PNP devices have a collector that is the substrate or p-well and therefore do not have a separate substrate terminal.
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Adds subcircuit models for the diodes to the original discrete models to make them forward-compatible with the combined models. Removes the meaningless 4th substrate terminal from PNP bipolar devices in the continuous models to make them backwards compatible with the original (discrete) models (and because the 4th terminal doesn't make any sense).