c2v sync example using TSYNC or TPUSH/TPOP

[learning-chip]

See sync_c2v_tpushpop.cpp and sync_c2v_tsync.cpp for two styles.

Reproduce

Based on this pto-isa commit on 03/24, both TPUSH/TPOP and TSYNC versions can run correctly, but both need some custom wrapper tweaks to TPipe and TSync APIs.

python ./run_sync_c2v.py gives:

=== TSYNC: loading sync_c2v_tsync_lib.so ===
[TSYNC] correct: True

=== TPUSH/TPOP: loading sync_c2v_tpushpop_lib.so ===
[TPUSH/TPOP] correct: True

Remaining issue

issue_report/issue_report.md explains why built-in TSync and TPipe are not sufficient for this particular case.

python issue_report/run_repro.py gives

=== Runtime launch + numeric check ===
[TSYNC repro] expected behavior: WRONG path (TSync_Custom C2V record path)
[TSYNC repro] launch: OK, numeric_correct: False
  ref tail:    tensor([47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47.,
        47., 47.], device='npu:0')
  output tail: tensor([47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47.,
        47., 47.], device='npu:0')
[TPipe repro (native)] expected behavior: WRONG path in full kernel (native Producer::record uses PIPE_FIX)
[TPipe repro (native)] launch: OK, numeric_correct: False
  ref tail:    tensor([47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47., 47.,
        47., 47.], device='npu:0')
  output tail: tensor([46., 46., 46., 46., 46., 46., 46., 46., 46., 46., 46., 46., 46., 46.,
        46., 46.], device='npu:0')
[TPipe repro (workaround)] expected behavior: CORRECT path (custom Producer::record uses PIPE_MTE3)
[TPipe repro (workaround)] launch: OK, numeric_correct: True

=== Numeric summary ===
- [TSYNC repro] observed numeric behavior: WRONG
- [TPipe repro (native)] observed numeric behavior: WRONG
- [TPipe repro (workaround)] observed numeric behavior: CORRECT
All repro launches completed.

TODO

• Adapt new changes to TPUSH/TPOP interface https://gitcode.com/cann/pto-isa/pull/569
• Report issue pto-isa repo

For Agent

This PR is largely created by Claude Code sonnet 4.6. Also generated porting-cce-to-pto-isa.md for what it learned, for future tasks.

[learning-chip]

Close in favor of #158