- 👋 Hi, I’m @Humayun Sheikh
- 👀 I’m interested in Digital System Design
- 🌱 I’m learning LINUX, VERILOG,SYSTEM VERILOG etc ...
- 💞️ I’m looking to collaborate on Digital Design projects...
- 📫 How to reach me ...
I am an Electronics engineer have interest in system design circuit designing RTL design and verification
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Digitek Engineering
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RTL-LEARNING
RTL-LEARNING PublicThe repo is dedicated for my practice and learning related Verilog and System Verilog
SystemVerilog
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