Skip to content

Fix: add store barriers in AICPU-AICore handshake on aarch64 #521

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
ChaoWao merged 1 commit into from
Apr 12, 2026
Merged

Fix: add store barriers in AICPU-AICore handshake on aarch64 #521

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 4 additions & 0 deletions src/a2a3/runtime/aicpu_build_graph/aicpu/aicpu_executor.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -572,6 +572,7 @@ int32_t AicpuExecutor::handshake_all_cores(Runtime *runtime) {
OUT_OF_ORDER_STORE_BARRIER();
all_handshakes[i].aicpu_ready = 1;
}
OUT_OF_ORDER_STORE_BARRIER();

// Get platform physical cores count for validation
uint32_t max_physical_cores_count = platform_get_physical_cores_count();
Expand Down Expand Up @@ -601,8 +602,11 @@ int32_t AicpuExecutor::handshake_all_cores(Runtime *runtime) {

// Initialize AICore registers after discovery (first round)
platform_init_aicore_regs(reg_addr);
OUT_OF_ORDER_STORE_BARRIER();
hank->aicpu_regs_ready = 1;

OUT_OF_ORDER_STORE_BARRIER();
Comment thread
ChaoWao marked this conversation as resolved.

while (hank->aicore_done == 0) {}

CoreType type = hank->core_type;
Expand Down
4 changes: 4 additions & 0 deletions src/a2a3/runtime/host_build_graph/aicpu/aicpu_executor.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -307,6 +307,7 @@ int AicpuExecutor::handshake_all_cores(Runtime *runtime) {
for (int i = 0; i < cores_total_num_; i++) {
all_handshakes[i].aicpu_ready = 1;
}
OUT_OF_ORDER_STORE_BARRIER();

// Get platform physical cores count for validation
uint32_t max_physical_cores_count = platform_get_physical_cores_count();
Expand Down Expand Up @@ -339,8 +340,11 @@ int AicpuExecutor::handshake_all_cores(Runtime *runtime) {

// Initialize AICore registers after discovery (first round)
platform_init_aicore_regs(reg_addr);
OUT_OF_ORDER_STORE_BARRIER();
hank->aicpu_regs_ready = 1;

OUT_OF_ORDER_STORE_BARRIER();
Comment thread
ChaoWao marked this conversation as resolved.

while (hank->aicore_done == 0) {}

CoreType type = hank->core_type;
Expand Down
4 changes: 4 additions & 0 deletions src/a2a3/runtime/tensormap_and_ringbuffer/aicpu/aicpu_executor.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -910,6 +910,7 @@ int32_t AicpuExecutor::handshake_all_cores(Runtime *runtime) {
OUT_OF_ORDER_STORE_BARRIER();
all_handshakes[i].aicpu_ready = 1;
}
OUT_OF_ORDER_STORE_BARRIER();

// Get platform physical cores count for validation
uint32_t max_physical_cores_count = platform_get_physical_cores_count();
Expand Down Expand Up @@ -939,8 +940,11 @@ int32_t AicpuExecutor::handshake_all_cores(Runtime *runtime) {

// Initialize AICore registers after discovery (first round)
platform_init_aicore_regs(reg_addr);
OUT_OF_ORDER_STORE_BARRIER();
hank->aicpu_regs_ready = 1;

OUT_OF_ORDER_STORE_BARRIER();
Comment thread
ChaoWao marked this conversation as resolved.

while (hank->aicore_done == 0) {}

CoreType type = hank->core_type;
Expand Down
4 changes: 4 additions & 0 deletions src/a5/runtime/host_build_graph/aicpu/aicpu_executor.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -300,6 +300,7 @@ int AicpuExecutor::handshake_all_cores(Runtime *runtime) {
for (int i = 0; i < cores_total_num_; i++) {
all_handshakes[i].aicpu_ready = 1;
}
OUT_OF_ORDER_STORE_BARRIER();

// Get platform physical cores count for validation
uint32_t max_physical_cores_count = platform_get_physical_cores_count();
Expand Down Expand Up @@ -332,8 +333,11 @@ int AicpuExecutor::handshake_all_cores(Runtime *runtime) {

// Initialize AICore registers after discovery (first round)
platform_init_aicore_regs(reg_addr);
OUT_OF_ORDER_STORE_BARRIER();
hank->aicpu_regs_ready = 1;

OUT_OF_ORDER_STORE_BARRIER();
Comment thread
ChaoWao marked this conversation as resolved.

while (hank->aicore_done == 0) {}

CoreType type = hank->core_type;
Expand Down
4 changes: 4 additions & 0 deletions src/a5/runtime/tensormap_and_ringbuffer/aicpu/aicpu_executor.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -898,6 +898,7 @@ int32_t AicpuExecutor::handshake_all_cores(Runtime *runtime) {
OUT_OF_ORDER_STORE_BARRIER();
all_handshakes[i].aicpu_ready = 1;
}
OUT_OF_ORDER_STORE_BARRIER();

// Get platform physical cores count for validation
uint32_t max_physical_cores_count = platform_get_physical_cores_count();
Expand Down Expand Up @@ -927,8 +928,11 @@ int32_t AicpuExecutor::handshake_all_cores(Runtime *runtime) {

// Initialize AICore registers after discovery (first round)
platform_init_aicore_regs(reg_addr);
OUT_OF_ORDER_STORE_BARRIER();
hank->aicpu_regs_ready = 1;

OUT_OF_ORDER_STORE_BARRIER();
Comment thread
ChaoWao marked this conversation as resolved.

while (hank->aicore_done == 0) {}

CoreType type = hank->core_type;
Expand Down
Loading