Penn Implementation of Computation Group
Research Group in Electrical and Systems Engineering and Computer and Information Science Departments at University of Pennsylvania
- 13 followers
- Philadelphia, PA
- http://ic.ese.upenn.edu
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prflow_nested_dfx
prflow_nested_dfx PublicFast and Flexible FPGA development using Hierarchical Partial Reconfiguration (FPT 2022)
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icgrp/ese532_code’s past year of commit activity - prflow_REFINE Public
REFINE: Runtime Execution Feedback for INcremental Evolution on FPGA Designs (FPGA 2024)
icgrp/prflow_REFINE’s past year of commit activity - prflow_nested_dfx Public
Fast and Flexible FPGA development using Hierarchical Partial Reconfiguration (FPT 2022)
icgrp/prflow_nested_dfx’s past year of commit activity - old_systolic_placer Public Forked from verilog-to-routing/vtr-verilog-to-routing
Updated systolic placer
icgrp/old_systolic_placer’s past year of commit activity - rosetta_vitis Public
icgrp/rosetta_vitis’s past year of commit activity
