Merge tag '2023-07-29' into push-2023-07-29

Change-Id: Iabf9a6b831e9384ff4d03c43eb60a8d0ed0f4dc5
intel · Jul 30, 2023 · c4c3eeb · c4c3eeb
2 parents 638b4f2 + 1c892cc
commit c4c3eeb
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Showing 3 changed files with 24 additions and 4 deletions.
diff --git a/scripts/filter.sh b/scripts/filter.sh
@@ -0,0 +1,4 @@
+
+
+cat $1| rs -c, -C, -T | grep "$2" | rs -c, -C, -T > $3
+
diff --git a/src/cpucounters.cpp b/src/cpucounters.cpp
@@ -6911,6 +6911,11 @@ void ServerUncorePMUs::initRegisterLocations(const PCM * pcm)
         PCM_PCICFG_QPI_INIT(2, SPR);
         PCM_PCICFG_QPI_INIT(3, SPR);
 
+        PCM_PCICFG_M3UPI_INIT(0, SPR);
+        PCM_PCICFG_M3UPI_INIT(1, SPR);
+        PCM_PCICFG_M3UPI_INIT(2, SPR);
+        PCM_PCICFG_M3UPI_INIT(3, SPR);
+
         PCM_PCICFG_M2M_INIT(0, SERVER)
         PCM_PCICFG_M2M_INIT(1, SERVER)
         PCM_PCICFG_M2M_INIT(2, SERVER)
@@ -7303,8 +7308,10 @@ void ServerUncorePMUs::initDirect(uint32 socket_, const PCM * pcm)
     }
     for (auto& handle : m3upiHandles)
     {
-        if (cpu_model == PCM::ICX)
+        switch (cpu_model)
         {
+        case PCM::ICX:
+        case PCM::SPR:
             m3upiPMUs.push_back(
                 UncorePMU(
                     std::make_shared<PCICFGRegister32>(handle, ICX_M3UPI_PCI_PMON_BOX_CTL_ADDR),
@@ -7318,9 +7325,9 @@ void ServerUncorePMUs::initDirect(uint32 socket_, const PCM * pcm)
                     std::make_shared<PCICFGRegister64>(handle, ICX_M3UPI_PCI_PMON_CTR3_ADDR)
                 )
             );
-        }
-        else
-        {
+            break;
+
+        default:
             m3upiPMUs.push_back(
                 UncorePMU(
                     std::make_shared<PCICFGRegister32>(handle, M3UPI_PCI_PMON_BOX_CTL_ADDR),

diff --git a/src/types.h b/src/types.h
@@ -778,6 +778,15 @@ constexpr auto ICX_M3UPI_PORT0_REGISTER_FUNC_ADDR = (1);
 constexpr auto ICX_M3UPI_PORT1_REGISTER_FUNC_ADDR = (1);
 constexpr auto ICX_M3UPI_PORT2_REGISTER_FUNC_ADDR = (1);
 
+constexpr auto SPR_M3UPI_PORT0_REGISTER_DEV_ADDR = 5;
+constexpr auto SPR_M3UPI_PORT1_REGISTER_DEV_ADDR = 6;
+constexpr auto SPR_M3UPI_PORT2_REGISTER_DEV_ADDR = 7;
+constexpr auto SPR_M3UPI_PORT3_REGISTER_DEV_ADDR = 8;
+constexpr auto SPR_M3UPI_PORT0_REGISTER_FUNC_ADDR = 1;
+constexpr auto SPR_M3UPI_PORT1_REGISTER_FUNC_ADDR = 1;
+constexpr auto SPR_M3UPI_PORT2_REGISTER_FUNC_ADDR = 1;
+constexpr auto SPR_M3UPI_PORT3_REGISTER_FUNC_ADDR = 1;
+
 #define SKX_M2M_0_REGISTER_DEV_ADDR  (8)
 #define SKX_M2M_0_REGISTER_FUNC_ADDR (0)
 #define SKX_M2M_1_REGISTER_DEV_ADDR  (9)