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Signed-off-by: Bokdeuk Jeong <[email protected]>
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To pass gic_timer_rel1_trig test suite in the acs test, add the timer state management for the non-sec world. Signed-off-by: Bokdeuk Jeong <[email protected]>
Signed-off-by: Bokdeuk Jeong <[email protected]>
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Do not print messages until MMU is turned on, except on cpu0. Cores other than cpu0 at this point are still in its mmu off state with d-cache disabled and i-cache enabled. This may cause incosistencies between cpus with mmu enabled and cpus with mmu disabled. Logging involves buffer allocation and its global data struct for heap (linked_list) could be corrupted due to the reason above. Signed-off-by: Bokdeuk Jeong <[email protected]>
Update acs test count but leave cmd_multithread_realm_mp test excluded. cmd_mutithread_realm_mp test passes now. However, an Inst abort took place at the end of the mp test within the host for unknown reason. Signed-off-by: Bokdeuk Jeong <[email protected]>
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Signed-off-by: Bokdeuk Jeong <[email protected]>
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I<VRWGS>: On REC entry, for both the EL1 Virtual Timer and the EL1 Physical Timer, if the EL1 timer asserts its output in the state described in the REC exit structure from the previous REC exit then the RMM masks the hardware timer signal before returning to the Realm. Signed-off-by: Bokdeuk Jeong <[email protected]>
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It now passes the muti-core test in acs, but the test case causes an instruction abort within the normal world. Although, it has no relation with the mp test itself, I left the test case in the skipped-tests.txt to continue performing remaining tests.