[WIP] Add basic FOTA capable bootloader

Cargo.toml

@@ -12,6 +12,10 @@ license = "MIT OR Apache-2.0"
 readme = "README.md"
 repository = "https://github.com/jonlamb-gh/oxcc"
 
+[dependencies.oxcc-bootloader]
+path = "oxcc-bootloader/"
+version = "0.1.0"
+
 [dependencies.panic-abort]
 version = "0.3.1"
 optional = true

memory.x

@@ -3,8 +3,12 @@ MEMORY
     /* NOTE K = KiBi = 1024 bytes */
 
     /* STM32F767ZI 2 MByte FLASH, 512 KByte RAM */
-    FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
-    RAM (xrw)  : ORIGIN = 0x20000000, LENGTH = 512K
+    /* FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K */
+
+    /* Using OxCC bootloader, user firmware starts at 0x0802_0000 */
+    FLASH (rx) : ORIGIN = 0x08020000, LENGTH = (2048K - 128K)
+    /* First 8 bytes are reserved for the bootloader sticky flag word */
+    RAM (xrw)  : ORIGIN = 0x20000008, LENGTH = (512K - 8)
 }
 
 /* This is where the call stack will be allocated. */

oxcc-bootloader/.gdbinit

@@ -0,0 +1,21 @@
+target remote :3333
+
+# print demangled symbols by default
+set print asm-demangle on
+
+monitor arm semihosting enable
+
+# # send captured ITM to the file itm.fifo
+# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
+# # 8000000 must match the core clock frequency
+# monitor tpiu config internal itm.fifo uart off 8000000
+
+# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
+# # 2000000 is the frequency of the SWO pin
+# monitor tpiu config external uart off 8000000 2000000
+
+# # enable ITM port 0
+# monitor itm port 0 on
+
+load
+step

oxcc-bootloader/.gitignore

@@ -0,0 +1,3 @@
+/target
+**/*.rs.bk
+.idea