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Merge pull request #7 from kendryte/develop
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ly0 authored Oct 15, 2018
2 parents 27d905b + 41dd0c6 commit 414021b
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Showing 9 changed files with 538 additions and 203 deletions.
2 changes: 1 addition & 1 deletion lib/drivers/dvp.c
Original file line number Diff line number Diff line change
Expand Up @@ -96,7 +96,7 @@ uint8_t dvp_sccb_receive_data(uint8_t dev_addr, uint16_t reg_addr)
}
dvp_sccb_start_transfer();

dvp->sccb_ctl = DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr);
dvp->sccb_ctl = DVP_SCCB_DEVICE_ADDRESS(dev_addr);

dvp_sccb_start_transfer();

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4 changes: 2 additions & 2 deletions lib/drivers/fpioa.c
Original file line number Diff line number Diff line change
Expand Up @@ -469,7 +469,7 @@ static const fpioa_assign_t function_config[FUNC_MAX] =
.pad_di = 0
},
{
.ch_sel = FUNC_CLK_IN1,
.ch_sel = FUNC_RESV6,
.ds = 0x0,
.oe_en = 0,
.oe_inv = 0,
Expand All @@ -489,7 +489,7 @@ static const fpioa_assign_t function_config[FUNC_MAX] =
.pad_di = 0
},
{
.ch_sel = FUNC_CLK_IN2,
.ch_sel = FUNC_RESV7,
.ds = 0x0,
.oe_en = 0,
.oe_inv = 0,
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8 changes: 4 additions & 4 deletions lib/drivers/i2s.c
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ static void i2s_receive_enable(i2s_device_number_t device_num, i2s_channel_num_t
u_irer.reg_data = readl(&i2s[device_num]->irer);
u_irer.irer.rxen = 1;
writel(u_irer.reg_data, &i2s[device_num]->irer);
/* I2S_RECEIVER block enable */
/* Receiver block enable */

i2s_recv_channel_enable(device_num, channel_num, 1);
/* Receive channel enable */
Expand All @@ -73,7 +73,7 @@ static void i2s_transimit_enable(i2s_device_number_t device_num, i2s_channel_num
u_iter.reg_data = readl(&i2s[device_num]->iter);
u_iter.iter.txen = 1;
writel(u_iter.reg_data, &i2s[device_num]->iter);
/* I2S_TRANSMITTER block enable */
/* Transmitter block enable */

i2s_transmit_channel_enable(device_num, channel_num, 1);
/* Transmit channel enable */
Expand All @@ -98,14 +98,14 @@ static void i2s_disable_block(i2s_device_number_t device_num, i2s_transmit_t rxt
u_irer.reg_data = readl(&i2s[device_num]->irer);
u_irer.irer.rxen = 0;
writel(u_irer.reg_data, &i2s[device_num]->irer);
/* I2S_RECEIVER block disable */
/* Receiver block disable */
}
else
{
u_iter.reg_data = readl(&i2s[device_num]->iter);
u_iter.iter.txen = 0;
writel(u_iter.reg_data, &i2s[device_num]->iter);
/* I2S_TRANSMITTER block disable */
/* Transmitter block disable */
}
}

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60 changes: 30 additions & 30 deletions lib/drivers/include/i2s.h
Original file line number Diff line number Diff line change
Expand Up @@ -87,15 +87,15 @@ typedef enum _word_length
{
/* Ignore the word length */
IGNORE_WORD_LENGTH = 0x0,
/* 12-bit data resolution of the I2S_RECEIVER */
/* 12-bit data resolution of the receiver */
RESOLUTION_12_BIT = 0x1,
/* 16-bit data resolution of the I2S_RECEIVER */
/* 16-bit data resolution of the receiver */
RESOLUTION_16_BIT = 0x2,
/* 20-bit data resolution of the I2S_RECEIVER */
/* 20-bit data resolution of the receiver */
RESOLUTION_20_BIT = 0x3,
/* 24-bit data resolution of the I2S_RECEIVER */
/* 24-bit data resolution of the receiver */
RESOLUTION_24_BIT = 0x4,
/* 32-bit data resolution of the I2S_RECEIVER */
/* 32-bit data resolution of the receiver */
RESOLUTION_32_BIT = 0x5
} i2s_word_length_t;

Expand Down Expand Up @@ -152,9 +152,9 @@ typedef union _ier_u

typedef struct _i2s_irer
{
/* Bit 0 is I2S_RECEIVER block enable,
* 0 for I2S_RECEIVER disable
* 1 for I2S_RECEIVER enable
/* Bit 0 is receiver block enable,
* 0 for receiver disable
* 1 for receiver enable
*/
uint32_t rxen : 1;
/* Bits [31:1] is reserved */
Expand All @@ -170,9 +170,9 @@ typedef union _irer_u
typedef struct _i2s_iter
{
uint32_t txen : 1;
/* Bit 0 is I2S_TRANSMITTER block enable,
* 0 for I2S_TRANSMITTER disable
* 1 for I2S_TRANSMITTER enable
/* Bit 0 is transmitter block enable,
* 0 for transmitter disable
* 1 for transmitter enable
*/
uint32_t resv : 31;
/* Bits [31:1] is reserved */
Expand Down Expand Up @@ -245,7 +245,7 @@ typedef union _ccr_u
typedef struct _i2s_rxffr
{
uint32_t rxffr : 1;
/* Bit 0 is I2S_RECEIVER FIFO reset,
/* Bit 0 is receiver FIFO reset,
* 0 for does not flush RX FIFO, 1 for flush RX FIFO
*/
uint32_t resv : 31;
Expand Down Expand Up @@ -322,13 +322,13 @@ typedef union _ter_u
typedef struct _i2s_rcr_tcr
{
/* Bits [2:0] is used to program desired data resolution of
* I2S_RECEIVER/I2S_TRANSMITTER,
* receiver/transmitter,
* 0x0 for ignore the word length
* 0x1 for 12-bit data resolution of the I2S_RECEIVER/I2S_TRANSMITTER,
* 0x2 for 16-bit data resolution of the I2S_RECEIVER/I2S_TRANSMITTER,
* 0x3 for 20-bit data resolution of the I2S_RECEIVER/I2S_TRANSMITTER,
* 0x4 for 24-bit data resolution of the I2S_RECEIVER/I2S_TRANSMITTER,
* 0x5 for 32-bit data resolution of the I2S_RECEIVER/I2S_TRANSMITTER
* 0x1 for 12-bit data resolution of the receiver/transmitter,
* 0x2 for 16-bit data resolution of the receiver/transmitter,
* 0x3 for 20-bit data resolution of the receiver/transmitter,
* 0x4 for 24-bit data resolution of the receiver/transmitter,
* 0x5 for 32-bit data resolution of the receiver/transmitter
*/
uint32_t wlen : 3;
/* Bits [31:3] is reseved */
Expand All @@ -342,7 +342,7 @@ typedef union _rcr_tcr_u {

typedef struct _i2s_isr
{
/* Bit 0 is status of I2S_RECEIVER data avaliable interrupt
/* Bit 0 is status of receiver data avaliable interrupt
* 0x0 for RX FIFO trigger level not reached
* 0x1 for RX FIFO trigger level is reached
*/
Expand Down Expand Up @@ -445,7 +445,7 @@ typedef union _tor_u
typedef struct _i2s_rfcr
{
/* Bits [3:0] is used program the trigger level in the RX FIFO at
* which the I2S_RECEIVER data available interrupt generate,
* which the receiver data available interrupt generate,
* 0x0 for interrupt trigger when FIFO level is 1,
* 0x2 for interrupt trigger when FIFO level is 2,
* 0x3 for interrupt trigger when FIFO level is 4,
Expand Down Expand Up @@ -476,7 +476,7 @@ typedef union _rfcr_u
typedef struct _i2s_tfcr
{
/* Bits [3:0] is used program the trigger level in the TX FIFO at
* which the I2S_RECEIVER data available interrupt generate,
* which the receiver data available interrupt generate,
* 0x0 for interrupt trigger when FIFO level is 1,
* 0x2 for interrupt trigger when FIFO level is 2,
* 0x3 for interrupt trigger when FIFO level is 4,
Expand Down Expand Up @@ -506,7 +506,7 @@ typedef union _tfcr_u

typedef struct _i2s_rff
{
/* Bit 0 is I2S_RECEIVER channel FIFO reset,
/* Bit 0 is receiver channel FIFO reset,
* 0x0 for does not flush an individual RX FIFO,
* 0x1 for flush an indiviadual RX FIFO
*/
Expand Down Expand Up @@ -587,30 +587,30 @@ typedef struct _i2s
{
/* I2S Enable Register (0x00) */
volatile uint32_t ier;
/* I2S I2S_RECEIVER Block Enable Register (0x04) */
/* I2S Receiver Block Enable Register (0x04) */
volatile uint32_t irer;
/* I2S I2S_TRANSMITTER Block Enable Register (0x08) */
/* I2S Transmitter Block Enable Register (0x08) */
volatile uint32_t iter;
/* Clock Enable Register (0x0c) */
volatile uint32_t cer;
/* Clock Configuration Register (0x10) */
volatile uint32_t ccr;
/* I2S_RECEIVER Block FIFO Reset Register (0x04) */
/* Receiver Block FIFO Reset Register (0x04) */
volatile uint32_t rxffr;
/* I2S_TRANSMITTER Block FIFO Reset Register (0x18) */
/* Transmitter Block FIFO Reset Register (0x18) */
volatile uint32_t txffr;
/* reserved (0x1c) */
volatile uint32_t reserved1;
volatile i2s_channel_t channel[4];
/* reserved (0x118-0x1bc) */
volatile uint32_t reserved2[40];
/* I2S_RECEIVER Block DMA Register (0x1c0) */
/* Receiver Block DMA Register (0x1c0) */
volatile uint32_t rxdma;
/* Reset I2S_RECEIVER Block DMA Register (0x1c4) */
/* Reset Receiver Block DMA Register (0x1c4) */
volatile uint32_t rrxdma;
/* I2S_TRANSMITTER Block DMA Register (0x1c8) */
/* Transmitter Block DMA Register (0x1c8) */
volatile uint32_t txdma;
/* Reset I2S_TRANSMITTER Block DMA Register (0x1cc) */
/* Reset Transmitter Block DMA Register (0x1cc) */
volatile uint32_t rtxdma;
/* reserved (0x1d0-0x1ec) */
volatile uint32_t reserved3[8];
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1 change: 0 additions & 1 deletion lib/drivers/include/sha256.h
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,6 @@ typedef struct _sha256
uint32_t sha_data_in1;
uint32_t reselved0;
sha_num_reg_t sha_num_reg;
/* */
sha_function_reg_0_t sha_function_reg_0;
uint32_t reserved1;
sha_function_reg_1_t sha_function_reg_1;
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6 changes: 3 additions & 3 deletions lib/drivers/include/spi.h
Original file line number Diff line number Diff line change
Expand Up @@ -143,9 +143,9 @@ typedef enum _spi_transfer_mode

typedef enum _spi_transfer_width
{
SPI_TRANS_CHAR = 0x0,
SPI_TRANS_SHORT = 0x1,
SPI_TRANS_INT = 0x2,
SPI_TRANS_CHAR = 0x1,
SPI_TRANS_SHORT = 0x2,
SPI_TRANS_INT = 0x4,
} spi_transfer_width_t;

typedef enum _spi_chip_select
Expand Down
2 changes: 1 addition & 1 deletion lib/drivers/include/uart.h
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@

/**
* @file
* @brief Universal Asynchronous I2S_RECEIVER/I2S_TRANSMITTER (UART)
* @brief Universal Asynchronous Receiver/Transmitter (UART)
*
* The UART peripheral supports the following features:
*
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2 changes: 1 addition & 1 deletion lib/drivers/include/uarths.h
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@

/**
* @file
* @brief Universal Asynchronous I2S_RECEIVER/I2S_TRANSMITTER (UART)
* @brief Universal Asynchronous Receiver/Transmitter (UART)
*
* The UART peripheral supports the following features:
*
Expand Down
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