Fix bugs

leonardt · Nov 17, 2023 · 15d8682 · 15d8682
1 parent 21887be
commit 15d8682
Showing 1 changed file with 4 additions and 3 deletions.
diff --git a/tests/test_property.py b/tests/test_property.py
@@ -609,7 +609,8 @@ class Main(m.Circuit):
     tester.compile_and_run("system-verilog", simulator="ncsim",
                            magma_output="mlir-verilog", flags=["-sv"],
                            magma_opts={"drive_undriven": True,
-                                       "terminate_unused": True})
+                                       "terminate_unused": True,
+                                       "flatten_all_tuples": True})
 
 
 @requires_ncsim
@@ -776,9 +777,9 @@ class Foo(m.Circuit):
         io.ready @= 1
         if use_sva:
             f.assert_(
-                f.sva(f.not_(~(io.valid & io.ready.value() & io.eop)),
+                # Note: need sequences to wrap parens
+                f.sva(f.not_(f.sequence(~(io.valid & io.ready.value() & io.eop))),
                       "throughout",
-                      # Note: need sequence here to wrap parens
                       f.sequence(f.sva((io.valid & io.ready.value() & io.sop),
                                        "[-> 2]"))),
                 name="eop_must_happen_btn_two_sop_A",