Fix sequence logic

leonardt · Nov 18, 2023 · b3eca7e · b3eca7e
1 parent 1cc700f
commit b3eca7e
Showing 1 changed file with 4 additions and 5 deletions.
diff --git a/tests/test_property.py b/tests/test_property.py
@@ -822,9 +822,9 @@ class Foo(m.Circuit):
         if use_sva:
             f.assert_(
                 f.sva(
-                    f.sequence(
+                    f.sequence(f.sva(
                         f.not_(~(io.valid & io.ready.value() & io.eop))
-                    ),
+                    )),
                     "throughout",
                     # Note: need sequences to wrap parens
                     f.sequence(f.sva((io.valid & io.ready.value() & io.sop),
@@ -842,9 +842,8 @@ class Foo(m.Circuit):
             )
         else:
             f.assert_(
-                f.sequence(
-                    f.not_(~(io.valid & io.ready.value() & io.eop))
-                ) | f.throughout |
+                f.not_(~(io.valid & io.ready.value() & io.eop))
+                | f.throughout |
                 ((io.valid & io.ready.value() & io.sop) | f.goto[2]),
                 name="eop_must_happen_btn_two_sop_A",
                 on=f.posedge(io.CLK),