nvme: Add support for get-reg and set-reg commands

The get-reg command is to output single register.
The set-reg command is to write nvme register.

Add below to stop the checkpatch "does MAINTAINERS need updating?" message.
 MAINTAINERS |

Signed-off-by: Tokunori Ikegami <[email protected]>

Documentation/nvme-get-reg.txt

@@ -0,0 +1,169 @@
+nvme-get-reg(1)
+===============
+
+NAME
+----
+nvme-get-reg - Read and show the defined NVMe controller register
+
+SYNOPSIS
+--------
+[verse]
+'nvme get-reg' <device> [--offset=<offset>, -O <offset>] [--human-readable | -H]
+			[--cap | -c] [--vs | -V] [--cmbloc | -m] [--cmbsz | -M]
+			[--bpinfo | -b] [--cmbsts | -S] [--cmbebs | -E]
+			[--cmbswtp | -W] [--crto | -r] [--pmrcap | -P]
+			[--pmrsts | -t] [--pmrebs | -e] [--pmrswtp | -w]
+			[--intms | -i] [--intmc | -I] [--cc | -C] [--csts | -T]
+			[--nssr | -n] [--aqa | -a] [--asq | -A] [--acq | -q]
+			[--bprsel | -B] [--bpmbl | -p] [--cmbmsc | -s]
+			[--nssd | -N] [--pmrctl | -R] [--pmrmscl | -l]
+			[--pmrmscu | -u]
+			[--output-format=<fmt> | -o <fmt>] [--verbose | -v]
+
+DESCRIPTION
+-----------
+Read and show the defined NVMe controller register.
+
+OPTIONS
+-------
+-O <offset>::
+--offset=<offset>::
+	offset of the requested register
+
+-H::
+--human-readable::
+	show register in readable format
+
+-c::
+--cap::
+	CAP=0x0 register offset
+
+-V::
+--vs::
+	VS=0x8 register offset
+
+-m::
+--cmbloc::
+	CMBLOC=0x38 register offset
+
+-M::
+--cmbsz::
+	CMBSZ=0x3c register offset
+
+-b::
+--bpinfo::
+	BPINFO=0x40 register offset
+
+-S::
+--cmbsts::
+	CMBSTS=0x58 register offset
+
+-E::
+--cmbebs::
+	CMBEBS=0x5c register offset
+
+-W::
+--cmbswtp::
+	CMBSWTP=0x60 register offset
+
+-r::
+--crto::
+	CRTO=0x68 register offset
+
+-P::
+--pmrcap::
+	PMRCAP=0xe00 register offset
+
+-t::
+--pmrsts::
+	PMRSTS=0xe08 register offset
+
+-e::
+--pmrebs::
+	PMREBS=0xe0c register offset
+
+-w::
+--pmrswtp::
+	PMRSWTP=0xe10 register offset
+
+-i::
+--intms::
+	INTMS=0xc register offset
+
+-I::
+--intmc::
+	INTMC=0x10 register offset
+
+-C::
+--cc::
+	CC=0x14 register offset
+
+-T::
+--csts::
+	CSTS=0x1c register offset
+
+-n::
+--nssr::
+	NSSR=0x20 register offset
+
+-a::
+--aqa::
+	AQA=0x24 register offset
+
+-A::
+--asq::
+	ASQ=0x28 register offset
+
+-q::
+--acq::
+	ACQ=0x30 register offset
+
+-B::
+--bprsel::
+	BPRSEL=0x44 register offset
+
+-p::
+--bpmbl::
+	BPMBL=0x48 register offset
+
+-s::
+--cmbmsc::
+	CMBMSC=0x50 register offset
+
+-N::
+--nssd::
+	NSSD=0x64 register offset
+
+-R::
+--pmrctl::
+	PMRCTL=0xe04 register offset
+
+-l::
+--pmrmscl::
+	PMRMSCL=0xe14 register offset
+
+-u::
+--pmrmscu::
+	PMRMSCU=0xe18 register offset
+
+-o <fmt>::
+--output-format=<fmt>::
+	Set the reporting format to 'normal', 'json' or 'binary'. Only one
+	output format can be used at a time.
+
+-v::
+--verbose::
+	Increase the information detail in the output.
+
+EXAMPLES
+--------
+* The following will run the get-reg command with CC=0x14 register offset
++
+------------
+# nvme get-reg /dev/nvme0 -C
+register: 0x0014 (Controller Configuration), value: 0x460001
+------------
+
+NVME
+----
+Part of the nvme-user suite.

Documentation/nvme-set-property.txt

@@ -23,8 +23,8 @@ OPTIONS
 --offset::
 	The offset of the property.
 
--V::
---value:
+-V <val>::
+--value=<val>::
 	The value of the property to be set.
 
 -o <fmt>::

Documentation/nvme-set-reg.txt

@@ -0,0 +1,120 @@
+nvme-set-reg(1)
+===============
+
+NAME
+----
+nvme-set-reg - Writes and shows the defined NVMe controller register
+
+SYNOPSIS
+--------
+[verse]
+'nvme set-reg' <device> [--offset=<offset>, -O <offset>]
+			[--value=<val> | -V <val>] [--mmio32 | -M]
+			[--intms=<val> | -i] [--intmc=<val> | -I <val>]
+			[--cc=<val> | -C <val>] [--csts=<val> | -T <val>]
+			[--nssr=<val> | -n <val>] [--aqa=<val> | -a <val>]
+			[--asq=<val> | -A <val>] [--acq=<val> | -q <val>]
+			[--bprsel=<val> | -B <val>] [--bpmbl=<val> | -p <val>]
+			[--cmbmsc=<val> | -s <val>] [--nssd=<val> | -N <val>]
+			[--pmrctl=<val> | -R <val>] [--pmrmscl=<val> | -l <val>]
+			[--pmrmscu=<val> | -u <val>]
+			[--output-format=<fmt> | -o <fmt>] [--verbose | -v]
+
+DESCRIPTION
+-----------
+Writes and shows the defined NVMe controller register.
+
+OPTIONS
+-------
+-O <offset>::
+--offset=<offset>::
+	offset of the requested register
+
+-V <val>::
+--value=<val>::
+	the value of the register to be set
+
+--mmio32::
+-M::
+	Access 64-bit registers as 2 32-bit
+
+-i <val>::
+--intms=<val>::
+	INTMS=0xc register offset
+
+-I <val>::
+--intmc=<val>::
+	INTMC=0x10 register offset
+
+-C <val>::
+--cc=<val>::
+	CC=0x14 register offset
+
+-T <val>::
+--csts=<val>::
+	CSTS=0x1c register offset
+
+-n <val>::
+--nssr=<val>::
+	NSSR=0x20 register offset
+
+-a <val>::
+--aqa=<val>::
+	AQA=0x24 register offset
+
+-A <val>::
+--asq=<val>::
+	ASQ=0x28 register offset
+
+-q <val>::
+--acq=<val>::
+	ACQ=0x30 register offset
+
+-B <val>::
+--bprsel=<val>::
+	BPRSEL=0x44 register offset
+
+-p <val>::
+--bpmbl=<val>::
+	BPMBL=0x48 register offset
+
+-s <val>::
+--cmbmsc=<val>::
+	CMBMSC=0x50 register offset
+
+-N <val>::
+--nssd=<val>::
+	NSSD=0x64 register offset
+
+-R <val>::
+--pmrctl=<val>::
+	PMRCTL=0xe04 register offset
+
+-l <val>::
+--pmrmscl=<val>::
+	PMRMSCL=0xe14 register offset
+
+-u <val>::
+--pmrmscu=<val>::
+	PMRMSCU=0xe18 register offset
+
+-o <fmt>::
+--output-format=<fmt>::
+	Set the reporting format to 'normal', 'json' or 'binary'. Only one
+	output format can be used at a time.
+
+-v::
+--verbose::
+	Increase the information detail in the output.
+
+EXAMPLES
+--------
+* The following will run the set-reg command with offset 0x14 and value 0x460000
++
+------------
+# nvme set-reg /dev/nvme0 -O 0x14 -V 0x460000
+------------
+
+NVME
+----
+Part of the nvme-user suite.

common.h

@@ -3,6 +3,7 @@
 #define _COMMON_H
 
 #include <string.h>
+#include <stdbool.h>
 
 #include "ccan/endian/endian.h"
 
@@ -35,4 +36,24 @@ static inline uint64_t mmio_read64(void *addr)
 	return ((uint64_t)high << 32) | low;
 }
 
+static inline void mmio_write32(void *addr, uint32_t value)
+{
+	leint32_t *p = addr;
+
+	*p = cpu_to_le32(value);
+}
+
+/* Access 64-bit registers as 2 32-bit if write32 flag set; Some devices fail 64-bit MMIO. */
+static inline void mmio_write64(void *addr, uint64_t value, bool write32)
+{
+	uint64_t *p = addr;
+
+	if (write32) {
+		mmio_write32(addr, value);
+		mmio_write32((uint32_t *)addr + 1, value >> 32);
+		return;
+	}
+
+	*p = cpu_to_le64(value);
+}
 #endif