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[CIR][HIP] Lower Device CIR to LLVM IR #1967
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[CIR][HIP] Lower Device CIR to LLVM IR #1967
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@bcardosolopes this code interleaves alloca's with address space casts. Is this allowed? Or should I add the allocas at the function entry point? |
clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/AMDGPU.cpp
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The allocas should already be at the function entry BB, are you seeing anything different? How does the final LLVM IR looks like? We should try to emit it to be the most similar as possible, but intermingling them within the function entry BB doesn't seem too problematic. |
Here is the device code generated for a device function through clangir: Here is OG: Both codes as far as I can tell are equivalent and should be fine. |
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Thanks for sharing the outputs! Yea, it looks fine to me as well. |
| // CIR: [[Local:%[0-9]+]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["i", init] | ||
| // CIR: [[Shared:%[0-9]+]] = cir.get_global @_ZZ2fnvE1j : !cir.ptr<!s32i, addrspace(offload_local)> | ||
| // CIR: [[Tmp:%[0-9]+]] = cir.load {{.*}} [[Local]] : !cir.ptr<!s32i>, !s32i | ||
| // CIR: cir.store{{.*}} [[Tmp]], [[Shared]] : !s32i, !cir.ptr<!s32i, addrspace(offload_local)> |
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Should we be testing LLVM and OGCG here as well? Or is such lowering not yet added? Anyways it's something that can be added in a follow up PR.
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