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TWiL 48 #184

Merged
merged 12 commits into from
May 14, 2024
35 changes: 26 additions & 9 deletions docs/baseline-reference.md
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我们目前大致采用「年份+季度」的格式称呼各条基线,
因为这样比较方便开发者们把版本号跟当时的细节(和不好的回忆)建立联系。

本文最近一次更新是在 2023 年 12 月初
此刻推荐的稳定基线是 2023Q1。
但我们预期前沿基线也将在 2024 年初达到足够稳定的状态(进而获得一个 2024Q1Q2 的名号),
因而十分推荐同时测试这些新版本;如有可能,尽量等待
本文最近一次更新是在 20245 月 12
此刻推荐的稳定基线是 2023Q1,测试基线是 2024Q2
当前的前沿基线预计将在 2024 年末达到足够稳定的状态(进而获得一个 2024Q42025Q1 的名号),
因而如果您预计适配 2024Q2 基线,那么我们十分推荐您将前沿基线也加入评估

## 前沿 {#bleeding-edge}

|Binutils|GCC|Linux|glibc|LLVM|Rust|Go |
|:------:|:-:|:---:|:---:|:--:|:--:|:-:|
|2.42 :wrench:|14.x :wrench:|6.6 LTS|2.39 :wrench:|18 :wrench:|1.74.x|1.22.x :wrench:|
|2.43 :wrench:|15.x :wrench:|6.12 LTS|2.4x :wrench:|19 :wrench:|1.8x.x|1.23.x :wrench:|

:wrench: 符号表示相关内容仍在开发中。

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本时期/本基线的主要特点有:

* :wrench: 部分实现了 LoongArch ELF psABI v20231219(整体版本号 v2.30)。
- v20230519::wrench: 支持了 linker relaxation(链接器松弛)。有已知坑,在打磨过程中。
* :wrench: 继续实现 LoongArch ELF psABI v20231219(整体版本号 v2.30)。
- v20230519::wrench: 继续完善 linker relaxation(链接器松弛)。
- v20231219::wrench: 预计将完全支持 TLS 描述符(TLSDESC)。
* Linux 方面,支持了 KVM 虚拟化。
* :wrench: 支持了更多 LoongArch v1.10 新增指令与语义变化等。
- 预计将支持 16 字节原子操作 :wrench::[tracking issue](https://github.com/loongson-community/discussions/issues/16)。

## 2024Q2 {#2024q2}

|Binutils|GCC|Linux|glibc|LLVM|Rust|Go |
|:------:|:-:|:---:|:---:|:--:|:--:|:-:|
|2.42|14.x|6.6 LTS|2.39|18|1.74.x|1.22.x|

这是 LoongArch 新世界高速发展过程中的第二条基线,体现了大尺度协同研发中众人得以完成的重大迭代,以及众多小修小补。

本时期/本基线的主要特点有:

* 部分实现了 LoongArch ELF psABI v20231219(整体版本号 v2.30)。
- v20230519:支持了 linker relaxation(链接器松弛):GNU 工具链的支持较完善,LLVM 工具链只实现了兼容性所必须的部分。可能仍有一些坑。
- v20231102:对于 `medium` 代码模型的过程调用,采用了相邻的 `pcaddu18i + jirl` 配合
`R_LARCH_CALL36` 的正确做法。
先前的取巧做法仍受支持;这仅仅是出于兼容存量二进制的考虑,不建议产生增量。
- v20231219:支持了 TLS 描述符(TLSDESC),其具体实现正在上游过程中 :wrench:
- v20231219:支持了 TLS 描述符(TLSDESC),除 glibc、musl 之外,都完成了主线化
- v20231219:要求 `extreme` 代码模型的四条拼接地址指令必须相邻。
对于存量的目标代码,如果有不相邻且跨了 4KiB 地址边界的这样一组拼接地址指令,那么它们将被错误链接,无解:
请打包者们密切关注涉及了 `extreme` 代码模型的软件(一般是大型项目或涉及特别底层的细节),确保生成的目标代码符合预期。
* 首度支持了 LoongArch v1.00 全量指令。可以汇编、反汇编、在程序中自由使用了。
但 KVM 虚拟化功能未能赶上 Linux 6.6 这一 2023 年的 LTS 版本。
* :wrench: 部分支持了 LoongArch v1.10 新增指令与语义变化等
* 支持了 LoongArch v1.10 新增指令的汇编、反汇编,部分支持了代码生成。如 gcc 为控制 32 位除法 erratum 与 `frecipe` 的使用,新增了命令行参数
* 编译器方面,初步具备了自动向量化能力。
* 首度获得了 Rust 语言支持。可用 Rust 为 Linux glibc 环境,以及裸机环境开发了。

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308 changes: 307 additions & 1 deletion docs/collection-of-typical-configurations.md
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本页面开放编辑!欢迎通过 GitHub 提交您的龙架构硬件配置,内容格式可参照附带的[模板章节](#template)。

## 3A6000 评估板(同 XA61200) {#3a6000-evb-xa61200}
## 华硕 XC-LS3A6M {#asus-xc-ls3a6m}

此主板与 XA61200 从软件方面看也非常相似,但重要区别在于其搭载了一片 Motorcomm YT6801 以太网控制器。

用来采集本数据的主板固件是一个测试版本,并且移除了图形显示功能,以兼容 Navi 架构的 AMD GPU。所用的内核也包含一些额外的驱动、开发中的功能等。

`uname -srvmpio`: `Linux 6.9.0-rc7-00036-g379ee315680a #1 SMP PREEMPT_DYNAMIC Wed Oct 11 05:48:28 PM CST 2023 loongarch64 unknown unknown GNU/Linux`

<details>
<summary>`CPUCFG`</summary>

```c
CPUCFG.0x0 = 0x0014d000
CPUCFG.0x1 = 0x07f2f2fe
CPUCFG.0x2 = 0x7e7cccc7
CPUCFG.0x3 = 0x00cefcff
CPUCFG.0x4 = 0x05f5e100
CPUCFG.0x5 = 0x00010001
CPUCFG.0x6 = 0x00007f33
CPUCFG.0x10 = 0x00002c3d
CPUCFG.0x11 = 0x06080003
CPUCFG.0x12 = 0x06080003
CPUCFG.0x13 = 0x0608000f
CPUCFG.0x14 = 0x060e000f
```

</details>

<details>
<summary>`/proc/cpuinfo`</summary>

```
system type : generic-loongson-machine

processor : 0
package : 0
core : 0
global_id : 0
CPU Family : Loongson-64bit
Model Name : Loongson-3A6000-HV
CPU Revision : 0x00
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu lsx lasx crc32 lvz lbt_x86 lbt_arm lbt_mips
Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 4

processor : 1
package : 0
core : 0
global_id : 1
CPU Family : Loongson-64bit
Model Name : Loongson-3A6000-HV
CPU Revision : 0x00
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu lsx lasx crc32 lvz lbt_x86 lbt_arm lbt_mips
Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 4

processor : 2
package : 0
core : 1
global_id : 2
CPU Family : Loongson-64bit
Model Name : Loongson-3A6000-HV
CPU Revision : 0x00
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu lsx lasx crc32 lvz lbt_x86 lbt_arm lbt_mips
Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 4

processor : 3
package : 0
core : 1
global_id : 3
CPU Family : Loongson-64bit
Model Name : Loongson-3A6000-HV
CPU Revision : 0x00
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu lsx lasx crc32 lvz lbt_x86 lbt_arm lbt_mips
Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 4

processor : 4
package : 0
core : 2
global_id : 4
CPU Family : Loongson-64bit
Model Name : Loongson-3A6000-HV
CPU Revision : 0x00
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu lsx lasx crc32 lvz lbt_x86 lbt_arm lbt_mips
Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 4

processor : 5
package : 0
core : 2
global_id : 5
CPU Family : Loongson-64bit
Model Name : Loongson-3A6000-HV
CPU Revision : 0x00
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu lsx lasx crc32 lvz lbt_x86 lbt_arm lbt_mips
Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 4

processor : 6
package : 0
core : 3
global_id : 6
CPU Family : Loongson-64bit
Model Name : Loongson-3A6000-HV
CPU Revision : 0x00
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu lsx lasx crc32 lvz lbt_x86 lbt_arm lbt_mips
Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 4

processor : 7
package : 0
core : 3
global_id : 7
CPU Family : Loongson-64bit
Model Name : Loongson-3A6000-HV
CPU Revision : 0x00
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu lsx lasx crc32 lvz lbt_x86 lbt_arm lbt_mips
Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 4

```

</details>

<details>
<summary>`sudo dmidecode -t 0,1,2,4,7`</summary>

```
# dmidecode 3.6
Getting SMBIOS data from sysfs.
SMBIOS 3.2.0 present.

Handle 0x0000, DMI type 0, 26 bytes
BIOS Information
Vendor: Loongson
Version: 9001
Release Date: 03/25/24 13:57:18
ROM Size: 4 MB
Characteristics:
PCI is supported
BIOS is upgradeable
Boot from CD is supported
Selectable boot is supported
BIOS ROM is socketed
Serial services are supported (int 14h)
USB legacy is supported
UEFI is supported

Handle 0x0001, DMI type 1, 27 bytes
System Information
Manufacturer: Loongson
Product Name: XC-LS3A6M
Version: To Be Filled By O.E.M
Serial Number: To Be Filled By O.E.M
UUID: 2dd58a14-107c-6162-0130-107c6162012f
Wake-up Type: Power Switch
SKU Number: To Be Filled By O.E.M
Family: To Be Filled By O.E.M

Handle 0x0002, DMI type 2, 17 bytes
Base Board Information
Manufacturer: Loongson
Product Name: XC-LS3A6M
Version: To Be Filled By O.E.M
Serial Number: 240132082200051
Asset Tag: To Be Filled By O.E.M
Features:
Board is a hosting board
Board is replaceable
Location In Chassis: Not Specified
Chassis Handle: 0x0000
Type: Motherboard
Contained Object Handles: 0

Handle 0x0004, DMI type 7, 27 bytes
Cache Information
Socket Designation: Not Specified
Configuration: Enabled, Not Socketed, Level 1
Operational Mode: Write Back
Location: Internal
Installed Size: 64 kB
Maximum Size: 64 kB
Supported SRAM Types:
Burst
Pipeline Burst
Synchronous
Installed SRAM Type: Burst Pipeline Burst Synchronous
Speed: Unknown
Error Correction Type: Single-bit ECC
System Type: Data
Associativity: 4-way Set-associative

Handle 0x0005, DMI type 7, 27 bytes
Cache Information
Socket Designation: Not Specified
Configuration: Enabled, Not Socketed, Level 2
Operational Mode: Write Back
Location: Internal
Installed Size: 256 kB
Maximum Size: 256 kB
Supported SRAM Types:
Burst
Pipeline Burst
Synchronous
Installed SRAM Type: Burst Pipeline Burst Synchronous
Speed: Unknown
Error Correction Type: Single-bit ECC
System Type: Data
Associativity: 16-way Set-associative

Handle 0x0006, DMI type 7, 27 bytes
Cache Information
Socket Designation: Not Specified
Configuration: Enabled, Not Socketed, Level 3
Operational Mode: Write Back
Location: Internal
Installed Size: 16 MB
Maximum Size: 16 MB
Supported SRAM Types:
Burst
Pipeline Burst
Synchronous
Installed SRAM Type: Burst Pipeline Burst Synchronous
Speed: Unknown
Error Correction Type: Single-bit ECC
System Type: Data
Associativity: 16-way Set-associative

Handle 0x0007, DMI type 4, 50 bytes
Processor Information
Socket Designation: CPU0
Type: Central Processor
Family: Loongson 3A
Manufacturer: Loongson
ID: 33 41 36 30 30 30 2D 48
Signature: Processor Identity 0x30364133

Version: Loongson-3A6000-HV
Voltage: 1.2 V
External Clock: 25 MHz
Max Speed: 2500 MHz
Current Speed: 2500 MHz
Status: Populated, Enabled
Upgrade: Socket BGA2422
L1 Cache Handle: 0x0004
L2 Cache Handle: 0x0005
L3 Cache Handle: 0x0006
Serial Number: Not Specified
Asset Tag: Not Specified
Part Number: Not Specified
Core Count: 8
Core Enabled: 8
Thread Count: 8
Characteristics:
64-bit capable
Multi-Core
Hardware Thread

```

</details>

## 3A6000 评估板(XA612A0) {#3a6000-evb-xa612a0}

此型号与 XA61200 固件兼容,仅网口等少数细节不同。如刷写另一型号的固件,仍可亮机,但个别板载设备如网口将因为异种固件不会以本型号的方式配置 LS7A 桥片,而无法被操作系统看到、使用。

`uname -srvmpio`: `Linux 6.6.0-rc3-next-20230928-gbcdaf018db45 #3 SMP PREEMPT Sun Jun 25 12:04:01 AM CST 2023 loongarch64 unknown unknown GNU/Linux`

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