x86_64: configure local APIC NMIs on each core

src/platform/x86_64/apic/nmi.c

@@ -11,7 +11,7 @@
  *
  * The trigger mode of local APIC NMIs is always set to be edge-sensitive, and
  * that of local APIC ExtINTs is always set to level-sensitive. LINT1 is always
- * hardwired to level-sensitive, and only LINT0 can be configured to use either
+ * hardwired to edge-sensitive, and only LINT0 can be configured to use either
  * edge or level according to the information from the ACPI MADT.
  */
 
@@ -46,4 +46,34 @@ int lnmiRegister(LocalNMI *lnmi) {
 
 int lnmiCount() {
     return nlnmi;
+}
+
+/* lnmiConfigure(): configures local APIC NMIs on a given core
+ * params: none
+ * returns: number of NMIs configured on this core
+ */
+
+int lnmiConfigure() {
+    if(!nlnmi || !lnmis) return 0;
+    int count = 0;
+
+    PlatformCPU *cpu = getKernelCPUInfo()->cpu;
+    uint8_t acpiID = cpu->procID;
+
+    // find local APIC NMIs with a matching ACPI ID
+    LocalNMI *list = lnmis;
+    while(list) {
+        if((list->procID == acpiID) || (list->procID == 0xFF)) {
+            uint32_t config = LAPIC_LVT_NMI;
+            if(list->low) config |= LAPIC_LVT_LOW;
+
+            if(list->lint & 1) lapicWrite(LAPIC_LVT_LINT1, config);
+            else lapicWrite(LAPIC_LVT_LINT0, config);
+            count++;
+        }
+
+        list = list->next;
+    }
+
+    return count;
 }

src/platform/x86_64/include/platform/apic.h

@@ -55,6 +55,11 @@
 #define LAPIC_LVT_LEVEL                 (1 << 15)
 #define LAPIC_LVT_LOW                   (1 << 13)
 
+#define LAPIC_LVT_SMI                   0x200
+#define LAPIC_LVT_NMI                   0x400
+#define LAPIC_LVT_EXTINT                0x700
+#define LAPIC_LVT_INIT                  0x500
+
 #define LAPIC_TIMER_ONE_SHOT            (0 << 17)
 #define LAPIC_TIMER_PERIODIC            (1 << 17)
 #define LAPIC_TIMER_TSC_DEADLINE        (2 << 17)