EPDiy S2 version with 16 bit data bus

Branch: S2-v1

Goals

1. To make existing code work with ESP32-S2 one core, still with an 8 bit data-bus (Actually uses the 2 Cores)
2. Extend the I2S_GPIO_BUS 8 gpios more up to 16 bit data-bus
3. Check and resolve the ordering using a Logic analyzer
4. Research if it’s possible to extend PSRAM to at least 8MB in S2

1st attempt

I still didn't had the chance to examine the data output with the logic analyzer. But this is already using I2S0 first I2S port to transmit the buffer data using LCD Mode. REF: https://github.com/martinberlin/epdiy-rotation/compare/develop...martinberlin:S2?expand=1

Further research

• Look at the tasks in render.c. They where designed to run in parallel on both esp32 cores, not sure how they interact on the single-core s2.

• Check the amazing work done on https://github.com/willz1200/i2s_parallel_queued project to use I2S paralell with a 16-bit bus.