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Feature: monitor cache-related perf events for L1D & LLC accesses/misses #121

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Feature: monitor cache-related perf events for L1D & LLC accesses/misses #121

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7524f46
feat: add cache events to tracked Linux perf counters
dssgabriel Nov 7, 2024
ee7f401
feat: add cache events to Mustache-like templates
dssgabriel Nov 7, 2024
fa0416f
fixup: clarify branch misses percentage in output
dssgabriel Nov 7, 2024
4cfcdb9
fix: add missing cache events to JSON Mustache-like template
dssgabriel Nov 8, 2024
78c10d9
fix: added missing commas in JSON Mustache-like template
dssgabriel Nov 8, 2024
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101 changes: 96 additions & 5 deletions src/include/nanobench.h
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Original file line number Diff line number Diff line change
Expand Up @@ -378,6 +378,10 @@ struct PerfCountSet {
T instructions{};
T branchInstructions{};
T branchMisses{};
T l1dAccesses{};
T l1dMisses{};
T llcAccesses{};
T llcMisses{};
};

} // namespace detail
Expand Down Expand Up @@ -427,6 +431,10 @@ class Result {
instructions,
branchinstructions,
branchmisses,
l1daccesses,
l1dmisses,
llcaccesses,
llcmisses,
_size
};

Expand Down Expand Up @@ -1374,7 +1382,7 @@ namespace templates {

char const* csv() noexcept {
return R"DELIM("title";"name";"unit";"batch";"elapsed";"error %";"instructions";"branches";"branch misses";"total"
{{#result}}"{{title}}";"{{name}}";"{{unit}}";{{batch}};{{median(elapsed)}};{{medianAbsolutePercentError(elapsed)}};{{median(instructions)}};{{median(branchinstructions)}};{{median(branchmisses)}};{{sumProduct(iterations, elapsed)}}
{{#result}}"{{title}}";"{{name}}";"{{unit}}";{{batch}};{{median(elapsed)}};{{medianAbsolutePercentError(elapsed)}};{{median(instructions)}};{{median(branchinstructions)}};{{median(branchmisses)}};{{median(l1daccesses)}};{{median(l1dmisses)}};{{median(llcaccesses)}};{{median(llcmisses)}};{{sumProduct(iterations, elapsed)}}
{{/result}})DELIM";
}

Expand Down Expand Up @@ -1456,6 +1464,10 @@ char const* json() noexcept {
"median(pagefaults)": {{median(pagefaults)}},
"median(branchinstructions)": {{median(branchinstructions)}},
"median(branchmisses)": {{median(branchmisses)}},
"median(l1daccesses)": {{median(l1daccesses)}},
"median(l1dmisses)": {{median(l1dmisses)}},
"median(llcaccesses)": {{median(llcaccesses)}},
"median(llcmisses)": {{median(llcmisses)}},
"totalTime": {{sumProduct(iterations, elapsed)}},
"measurements": [
{{#measurement}} {
Expand All @@ -1466,7 +1478,11 @@ char const* json() noexcept {
"contextswitches": {{contextswitches}},
"instructions": {{instructions}},
"branchinstructions": {{branchinstructions}},
"branchmisses": {{branchmisses}}
"branchmisses": {{branchmisses}},
"l1daccesses": {{l1daccesses}},
"l1dmisses": {{l1dmisses}},
"llcaccesses": {{llcaccesses}},
"llcmisses": {{llcmisses}}
}{{^-last}},{{/-last}}
{{/measurement}} ]
}{{^-last}},{{/-last}}
Expand Down Expand Up @@ -2314,7 +2330,29 @@ struct IterationLogic::Impl {
if (rBraMedian >= 1e-9) {
p = 100.0 * mResult.median(Result::Measure::branchmisses) / rBraMedian;
}
columns.emplace_back(10, 1, "miss%", "%", p);
columns.emplace_back(13, 1, "bra miss%", "%", p);
}
}
if (mBench.performanceCounters() && mResult.has(Result::Measure::l1daccesses)) {
double const rL1dMedian = mResult.median(Result::Measure::l1daccesses);
columns.emplace_back(18, 2, "L1D$ ref/" + mBench.unit(), "", rL1dMedian / mBench.batch());
if (mResult.has(Result::Measure::l1dmisses)) {
double p = 0.0;
if (rL1dMedian >= 1e-9) {
p = 100.0 * mResult.median(Result::Measure::l1dmisses) / rL1dMedian;
}
columns.emplace_back(13, 2, "L1D$ miss%", "%", p);
}
}
if (mBench.performanceCounters() && mResult.has(Result::Measure::llcaccesses)) {
double const rLlcMedian = mResult.median(Result::Measure::llcaccesses);
columns.emplace_back(18, 2, "LL$ ref/" + mBench.unit(), "", rLlcMedian / mBench.batch());
if (mResult.has(Result::Measure::llcmisses)) {
double p = 0.0;
if (rLlcMedian >= 1e-9) {
p = 100.0 * mResult.median(Result::Measure::llcmisses) / rLlcMedian;
}
columns.emplace_back(13, 2, "LL$ miss%", "%", p);
}
}

Expand Down Expand Up @@ -2441,6 +2479,7 @@ class LinuxPerformanceCounters {

bool monitor(perf_sw_ids swId, Target target);
bool monitor(perf_hw_id hwId, Target target);
bool monitor(uint32_t type, uint64_t eventid, Target target);

ANKERL_NANOBENCH(NODISCARD) bool hasError() const noexcept {
return mHasError;
Expand Down Expand Up @@ -2566,8 +2605,6 @@ class LinuxPerformanceCounters {
}

private:
bool monitor(uint32_t type, uint64_t eventid, Target target);

std::map<uint64_t, Target> mIdToTarget{};

// start with minimum size of 3 for read_format
Expand Down Expand Up @@ -2709,6 +2746,22 @@ PerformanceCounters::PerformanceCounters()
mPc->monitor(PERF_COUNT_HW_BRANCH_INSTRUCTIONS, LinuxPerformanceCounters::Target(&mVal.branchInstructions, true, false));
mHas.branchMisses = mPc->monitor(PERF_COUNT_HW_BRANCH_MISSES, LinuxPerformanceCounters::Target(&mVal.branchMisses, true, false));
// mHas.branchMisses = false;
mHas.l1dAccesses = mPc->monitor(
PERF_TYPE_HW_CACHE,
uint64_t(PERF_COUNT_HW_CACHE_L1D) | (uint64_t(PERF_COUNT_HW_CACHE_OP_READ) << 8) | (uint64_t(PERF_COUNT_HW_CACHE_RESULT_ACCESS) << 16),
LinuxPerformanceCounters::Target(&mVal.l1dAccesses, true, false));
mHas.l1dMisses = mPc->monitor(
PERF_TYPE_HW_CACHE,
uint64_t(PERF_COUNT_HW_CACHE_L1D) | (uint64_t(PERF_COUNT_HW_CACHE_OP_READ) << 8) | (uint64_t(PERF_COUNT_HW_CACHE_RESULT_MISS) << 16),
LinuxPerformanceCounters::Target(&mVal.l1dMisses, true, false));
mHas.llcAccesses = mPc->monitor(
PERF_TYPE_HW_CACHE,
uint64_t(PERF_COUNT_HW_CACHE_LL) | (uint64_t(PERF_COUNT_HW_CACHE_OP_READ) << 8) | (uint64_t(PERF_COUNT_HW_CACHE_RESULT_ACCESS) << 16),
LinuxPerformanceCounters::Target(&mVal.llcAccesses, true, false));
mHas.llcMisses = mPc->monitor(
PERF_TYPE_HW_CACHE,
uint64_t(PERF_COUNT_HW_CACHE_LL) | (uint64_t(PERF_COUNT_HW_CACHE_OP_READ) << 8) | (uint64_t(PERF_COUNT_HW_CACHE_RESULT_MISS) << 16),
LinuxPerformanceCounters::Target(&mVal.llcMisses, true, false));

// SW events
mHas.pageFaults = mPc->monitor(PERF_COUNT_SW_PAGE_FAULTS, LinuxPerformanceCounters::Target(&mVal.pageFaults, true, false));
Expand Down Expand Up @@ -2965,6 +3018,32 @@ void Result::add(Clock::duration totalElapsed, uint64_t iters, detail::Performan
mNameToMeasurements[u(Result::Measure::branchmisses)].push_back(branchMisses / dIters);
}
}
if (pc.has().l1dAccesses) {
double l1dAccesses = d(pc.val().l1dAccesses);
mNameToMeasurements[u(Result::Measure::l1daccesses)].push_back(l1dAccesses / dIters);

if (pc.has().l1dMisses) {
double l1dMisses = d(pc.val().l1dMisses);
if (l1dMisses > l1dAccesses) {
// can't have more L1D$ misses than there were accesses...
l1dMisses = l1dAccesses;
}
mNameToMeasurements[u(Result::Measure::l1dmisses)].push_back(l1dMisses / dIters);
}
}
if (pc.has().llcAccesses) {
double llcAccesses = d(pc.val().llcAccesses);
mNameToMeasurements[u(Result::Measure::llcaccesses)].push_back(llcAccesses / dIters);

if (pc.has().llcMisses) {
double llcMisses = d(pc.val().llcMisses);
if (llcMisses > llcAccesses) {
// can't have more LL$ misses than there were accesses...
llcMisses = llcAccesses;
}
mNameToMeasurements[u(Result::Measure::llcmisses)].push_back(llcMisses / dIters);
}
}
}

Config const& Result::config() const noexcept {
Expand Down Expand Up @@ -3110,6 +3189,18 @@ Result::Measure Result::fromString(std::string const& str) {
if (str == "branchmisses") {
return Measure::branchmisses;
}
if (str == "l1daccesses") {
return Measure::l1daccesses;
}
if (str == "l1dmisses") {
return Measure::l1dmisses;
}
if (str == "llcaccesses") {
return Measure::llcaccesses;
}
if (str == "llcmisses") {
return Measure::llcmisses;
}
// not found, return _size
return Measure::_size;
}
Expand Down