Create safe slices from cdef_line_buf

src/cdef.rs

@@ -5,19 +5,14 @@ use crate::include::common::bitdepth::LeftPixelRow2px;
 use crate::include::common::intops::apply_sign;
 use crate::include::common::intops::iclip;
 use crate::include::common::intops::ulog2;
+use crate::src::cpu::CpuFlags;
 use crate::src::tables::dav1d_cdef_directions;
 use bitflags::bitflags;
 use libc::ptrdiff_t;
 use std::cmp;
 use std::ffi::c_int;
 use std::ffi::c_uint;
 
-#[cfg(feature = "asm")]
-use cfg_if::cfg_if;
-
-#[cfg(feature = "asm")]
-use crate::src::cpu::{rav1d_get_cpu_flags, CpuFlags};
-
 #[cfg(feature = "asm")]
 use crate::include::common::bitdepth::BPC;
 
@@ -1030,98 +1025,6 @@ unsafe fn cdef_find_dir_rust<BD: BitDepth>(
     return best_dir;
 }
 
-#[inline(always)]
-#[cfg(all(feature = "asm", any(target_arch = "x86", target_arch = "x86_64"),))]
-unsafe fn cdef_dsp_init_x86<BD: BitDepth>(c: *mut Rav1dCdefDSPContext) {
-    let flags = rav1d_get_cpu_flags();
-
-    match BD::BPC {
-        BPC::BPC8 => {
-            if !flags.contains(CpuFlags::SSE2) {
-                return;
-            }
-
-            (*c).fb[0] = dav1d_cdef_filter_8x8_8bpc_sse2;
-            (*c).fb[1] = dav1d_cdef_filter_4x8_8bpc_sse2;
-            (*c).fb[2] = dav1d_cdef_filter_4x4_8bpc_sse2;
-
-            if !flags.contains(CpuFlags::SSSE3) {
-                return;
-            }
-
-            (*c).dir = dav1d_cdef_dir_8bpc_ssse3;
-            (*c).fb[0] = dav1d_cdef_filter_8x8_8bpc_ssse3;
-            (*c).fb[1] = dav1d_cdef_filter_4x8_8bpc_ssse3;
-            (*c).fb[2] = dav1d_cdef_filter_4x4_8bpc_ssse3;
-
-            if !flags.contains(CpuFlags::SSE41) {
-                return;
-            }
-
-            (*c).dir = dav1d_cdef_dir_8bpc_sse4;
-            (*c).fb[0] = dav1d_cdef_filter_8x8_8bpc_sse4;
-            (*c).fb[1] = dav1d_cdef_filter_4x8_8bpc_sse4;
-            (*c).fb[2] = dav1d_cdef_filter_4x4_8bpc_sse4;
-
-            #[cfg(target_arch = "x86_64")]
-            {
-                if !flags.contains(CpuFlags::AVX2) {
-                    return;
-                }
-
-                (*c).dir = dav1d_cdef_dir_8bpc_avx2;
-                (*c).fb[0] = dav1d_cdef_filter_8x8_8bpc_avx2;
-                (*c).fb[1] = dav1d_cdef_filter_4x8_8bpc_avx2;
-                (*c).fb[2] = dav1d_cdef_filter_4x4_8bpc_avx2;
-
-                if !flags.contains(CpuFlags::AVX512ICL) {
-                    return;
-                }
-
-                (*c).fb[0] = dav1d_cdef_filter_8x8_8bpc_avx512icl;
-                (*c).fb[1] = dav1d_cdef_filter_4x8_8bpc_avx512icl;
-                (*c).fb[2] = dav1d_cdef_filter_4x4_8bpc_avx512icl;
-            }
-        }
-        BPC::BPC16 => {
-            if !flags.contains(CpuFlags::SSSE3) {
-                return;
-            }
-
-            (*c).dir = dav1d_cdef_dir_16bpc_ssse3;
-            (*c).fb[0] = dav1d_cdef_filter_8x8_16bpc_ssse3;
-            (*c).fb[1] = dav1d_cdef_filter_4x8_16bpc_ssse3;
-            (*c).fb[2] = dav1d_cdef_filter_4x4_16bpc_ssse3;
-
-            if !flags.contains(CpuFlags::SSE41) {
-                return;
-            }
-
-            (*c).dir = dav1d_cdef_dir_16bpc_sse4;
-
-            #[cfg(target_arch = "x86_64")]
-            {
-                if !flags.contains(CpuFlags::AVX2) {
-                    return;
-                }
-
-                (*c).dir = dav1d_cdef_dir_16bpc_avx2;
-                (*c).fb[0] = dav1d_cdef_filter_8x8_16bpc_avx2;
-                (*c).fb[1] = dav1d_cdef_filter_4x8_16bpc_avx2;
-                (*c).fb[2] = dav1d_cdef_filter_4x4_16bpc_avx2;
-
-                if !flags.contains(CpuFlags::AVX512ICL) {
-                    return;
-                }
-
-                (*c).fb[0] = dav1d_cdef_filter_8x8_16bpc_avx512icl;
-                (*c).fb[1] = dav1d_cdef_filter_4x8_16bpc_avx512icl;
-                (*c).fb[2] = dav1d_cdef_filter_4x4_16bpc_avx512icl;
-            }
-        }
-    };
-}
-
 #[inline(always)]
 #[cfg(all(feature = "asm", any(target_arch = "arm", target_arch = "aarch64"),))]
 unsafe extern "C" fn cdef_filter_8x8_neon_erased<BD: BitDepth>(
@@ -1274,37 +1177,150 @@ unsafe extern "C" fn cdef_filter_4x4_neon_erased<BD: BitDepth>(
     }
 }
 
-#[inline(always)]
-#[cfg(all(feature = "asm", any(target_arch = "arm", target_arch = "aarch64"),))]
-unsafe fn cdef_dsp_init_arm<BD: BitDepth>(c: *mut Rav1dCdefDSPContext) {
-    let flags = rav1d_get_cpu_flags();
+impl Rav1dCdefDSPContext {
+    pub const fn default<BD: BitDepth>() -> Self {
+        Self {
+            dir: cdef_find_dir_c_erased::<BD>,
+            fb: [
+                cdef_filter_block_8x8_c_erased::<BD>,
+                cdef_filter_block_4x8_c_erased::<BD>,
+                cdef_filter_block_4x4_c_erased::<BD>,
+            ],
+        }
+    }
+
+    #[cfg(all(feature = "asm", any(target_arch = "x86", target_arch = "x86_64")))]
+    #[inline(always)]
+    const fn init_x86<BD: BitDepth>(mut self, flags: CpuFlags) -> Self {
+        match BD::BPC {
+            BPC::BPC8 => {
+                if !flags.contains(CpuFlags::SSE2) {
+                    return self;
+                }
+
+                self.fb[0] = dav1d_cdef_filter_8x8_8bpc_sse2;
+                self.fb[1] = dav1d_cdef_filter_4x8_8bpc_sse2;
+                self.fb[2] = dav1d_cdef_filter_4x4_8bpc_sse2;
+
+                if !flags.contains(CpuFlags::SSSE3) {
+                    return self;
+                }
+
+                self.dir = dav1d_cdef_dir_8bpc_ssse3;
+                self.fb[0] = dav1d_cdef_filter_8x8_8bpc_ssse3;
+                self.fb[1] = dav1d_cdef_filter_4x8_8bpc_ssse3;
+                self.fb[2] = dav1d_cdef_filter_4x4_8bpc_ssse3;
+
+                if !flags.contains(CpuFlags::SSE41) {
+                    return self;
+                }
+
+                self.dir = dav1d_cdef_dir_8bpc_sse4;
+                self.fb[0] = dav1d_cdef_filter_8x8_8bpc_sse4;
+                self.fb[1] = dav1d_cdef_filter_4x8_8bpc_sse4;
+                self.fb[2] = dav1d_cdef_filter_4x4_8bpc_sse4;
+
+                #[cfg(target_arch = "x86_64")]
+                {
+                    if !flags.contains(CpuFlags::AVX2) {
+                        return self;
+                    }
+
+                    self.dir = dav1d_cdef_dir_8bpc_avx2;
+                    self.fb[0] = dav1d_cdef_filter_8x8_8bpc_avx2;
+                    self.fb[1] = dav1d_cdef_filter_4x8_8bpc_avx2;
+                    self.fb[2] = dav1d_cdef_filter_4x4_8bpc_avx2;
+
+                    if !flags.contains(CpuFlags::AVX512ICL) {
+                        return self;
+                    }
+
+                    self.fb[0] = dav1d_cdef_filter_8x8_8bpc_avx512icl;
+                    self.fb[1] = dav1d_cdef_filter_4x8_8bpc_avx512icl;
+                    self.fb[2] = dav1d_cdef_filter_4x4_8bpc_avx512icl;
+                }
+            }
+            BPC::BPC16 => {
+                if !flags.contains(CpuFlags::SSSE3) {
+                    return self;
+                }
+
+                self.dir = dav1d_cdef_dir_16bpc_ssse3;
+                self.fb[0] = dav1d_cdef_filter_8x8_16bpc_ssse3;
+                self.fb[1] = dav1d_cdef_filter_4x8_16bpc_ssse3;
+                self.fb[2] = dav1d_cdef_filter_4x4_16bpc_ssse3;
+
+                if !flags.contains(CpuFlags::SSE41) {
+                    return self;
+                }
 
-    if !flags.contains(CpuFlags::NEON) {
-        return;
+                self.dir = dav1d_cdef_dir_16bpc_sse4;
+
+                #[cfg(target_arch = "x86_64")]
+                {
+                    if !flags.contains(CpuFlags::AVX2) {
+                        return self;
+                    }
+
+                    self.dir = dav1d_cdef_dir_16bpc_avx2;
+                    self.fb[0] = dav1d_cdef_filter_8x8_16bpc_avx2;
+                    self.fb[1] = dav1d_cdef_filter_4x8_16bpc_avx2;
+                    self.fb[2] = dav1d_cdef_filter_4x4_16bpc_avx2;
+
+                    if !flags.contains(CpuFlags::AVX512ICL) {
+                        return self;
+                    }
+
+                    self.fb[0] = dav1d_cdef_filter_8x8_16bpc_avx512icl;
+                    self.fb[1] = dav1d_cdef_filter_4x8_16bpc_avx512icl;
+                    self.fb[2] = dav1d_cdef_filter_4x4_16bpc_avx512icl;
+                }
+            }
+        };
+
+        self
     }
 
-    (*c).dir = match BD::BPC {
-        BPC::BPC8 => dav1d_cdef_find_dir_8bpc_neon,
-        BPC::BPC16 => dav1d_cdef_find_dir_16bpc_neon,
-    };
-    (*c).fb[0] = cdef_filter_8x8_neon_erased::<BD>;
-    (*c).fb[1] = cdef_filter_4x8_neon_erased::<BD>;
-    (*c).fb[2] = cdef_filter_4x4_neon_erased::<BD>;
-}
+    #[cfg(all(feature = "asm", any(target_arch = "arm", target_arch = "aarch64")))]
+    #[inline(always)]
+    const fn init_arm<BD: BitDepth>(mut self, flags: CpuFlags) -> Self {
+        if !flags.contains(CpuFlags::NEON) {
+            return self;
+        }
+
+        self.dir = match BD::BPC {
+            BPC::BPC8 => dav1d_cdef_find_dir_8bpc_neon,
+            BPC::BPC16 => dav1d_cdef_find_dir_16bpc_neon,
+        };
+        self.fb[0] = cdef_filter_8x8_neon_erased::<BD>;
+        self.fb[1] = cdef_filter_4x8_neon_erased::<BD>;
+        self.fb[2] = cdef_filter_4x4_neon_erased::<BD>;
 
-#[cold]
-pub unsafe fn rav1d_cdef_dsp_init<BD: BitDepth>(c: *mut Rav1dCdefDSPContext) {
-    (*c).dir = cdef_find_dir_c_erased::<BD>;
-    (*c).fb[0] = cdef_filter_block_8x8_c_erased::<BD>;
-    (*c).fb[1] = cdef_filter_block_4x8_c_erased::<BD>;
-    (*c).fb[2] = cdef_filter_block_4x4_c_erased::<BD>;
+        self
+    }
 
-    #[cfg(feature = "asm")]
-    cfg_if! {
-        if #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] {
-            cdef_dsp_init_x86::<BD>(c);
-        } else if #[cfg(any(target_arch = "arm", target_arch = "aarch64"))] {
-            cdef_dsp_init_arm::<BD>(c);
+    #[inline(always)]
+    const fn init<BD: BitDepth>(self, flags: CpuFlags) -> Self {
+        #[cfg(feature = "asm")]
+        {
+            #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
+            {
+                return self.init_x86::<BD>(flags);
+            }
+            #[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
+            {
+                return self.init_arm::<BD>(flags);
+            }
+        }
+
+        #[allow(unreachable_code)] // Reachable on some #[cfg]s.
+        {
+            let _ = flags;
+            self
         }
     }
+
+    pub const fn new<BD: BitDepth>(flags: CpuFlags) -> Self {
+        Self::default::<BD>().init::<BD>(flags)
+    }
 }

src/cdef_apply.rs

@@ -171,7 +171,6 @@ pub(crate) unsafe fn rav1d_cdef_brow<BD: BitDepth>(
         BPC::BPC8 => 0,
         BPC::BPC16 => f.cur.p.bpc - 8,
     };
-    let dsp = &*f.dsp;
     let mut edges: CdefEdgeFlags = if by_start > 0 {
         CdefEdgeFlags::HAVE_BOTTOM | CdefEdgeFlags::HAVE_TOP
     } else {
@@ -304,7 +303,7 @@ pub(crate) unsafe fn rav1d_cdef_brow<BD: BitDepth>(
 
                         let mut variance = 0;
                         let dir = if y_pri_lvl != 0 || uv_pri_lvl != 0 {
-                            (dsp.cdef.dir)(
+                            (f.dsp.cdef.dir)(
                                 bptrs[0].cast(),
                                 f.cur.stride[0],
                                 &mut variance,
@@ -370,7 +369,7 @@ pub(crate) unsafe fn rav1d_cdef_brow<BD: BitDepth>(
                         if y_pri_lvl != 0 {
                             let adj_y_pri_lvl = adjust_strength(y_pri_lvl, variance);
                             if adj_y_pri_lvl != 0 || y_sec_lvl != 0 {
-                                dsp.cdef.fb[0](
+                                f.dsp.cdef.fb[0](
                                     bptrs[0].cast(),
                                     f.cur.stride[0],
                                     lr_bak[bit as usize][0].as_mut_ptr().cast(),
@@ -385,7 +384,7 @@ pub(crate) unsafe fn rav1d_cdef_brow<BD: BitDepth>(
                                 );
                             }
                         } else if y_sec_lvl != 0 {
-                            dsp.cdef.fb[0](
+                            f.dsp.cdef.fb[0](
                                 bptrs[0].cast(),
                                 f.cur.stride[0],
                                 (lr_bak[bit as usize][0]).as_mut_ptr().cast(),
@@ -469,7 +468,7 @@ pub(crate) unsafe fn rav1d_cdef_brow<BD: BitDepth>(
                                     bot = bptrs[pl].offset((8 >> ss_ver) * uv_stride);
                                 }
 
-                                dsp.cdef.fb[uv_idx as usize](
+                                f.dsp.cdef.fb[uv_idx as usize](
                                     bptrs[pl].cast(),
                                     f.cur.stride[1],
                                     lr_bak[bit as usize][pl].as_mut_ptr().cast(),

src/cpu.rs

@@ -180,7 +180,6 @@ static rav1d_cpu_flags: AtomicU32 = AtomicU32::new(0);
 /// so it shouldn't be performance sensitive.
 static rav1d_cpu_flags_mask: AtomicU32 = AtomicU32::new(!0);
 
-#[cfg(feature = "asm")]
 #[inline(always)]
 pub(crate) fn rav1d_get_cpu_flags() -> CpuFlags {
     let flags =