-
-
Notifications
You must be signed in to change notification settings - Fork 0
Boards
OpenMBMC has been tested on several FPGA boards.
Board with Altera Agilex-5 and Winbond 1.2V 16MByte HyperRAM. Set Address bits to 24 to support 16MByte.
This board is used to test new functions. The board has one ISSI HyperRAM on-board and a CRUVI-HS slot to add HyperRAM/HyperFlash on add-on board. APmemory OPI Device on CR00045 has also been tested.
This board is used to test Lattice versions of the IP core. The board has one Infineon HyperRAM on-board and a CRUVI-HS slot to add HyperRAM/HyperFlash on add-on board.
Special note to CR00103-3 users: the on-board clock of 12MHz can only be used with the old version of the PLL IP Core. This older version 1.6.0 has been made available at this git repository it is in file PLL_1_6_0.zip please download and extract this file to the local disk. Then "install" the IP to Radiant and Propel. The locations to copy the files (the unzipped directory):
- [path]\lscc\propel[VERSION]\builder\rtf\ip\lifcl\
- [path]\lscc\radiant[VERSION]\ip\lifcl\
Use PLL IP Core version 1.6.0 in Propel/Radiant, do not not update the IP core in your design.