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igvmfilegen: bump igvm to microsoft/igvm main and adapt callers #3907

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Merged
chris-oo merged 1 commit into from
Jul 10, 2026
+66 −16
Merged

igvmfilegen: bump igvm to microsoft/igvm main and adapt callers #3907

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18 changes: 8 additions & 10 deletions Cargo.lock
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Original file line number Diff line number Diff line change
Expand Up @@ -326,9 +326,9 @@ checksum = "1e4b40c7323adcfc0a41c4b88143ed58346ff65a288fc144329c5c45e05d70c6"

[[package]]
name = "bitfield-struct"
version = "0.10.1"
version = "0.11.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "2be5a46ba01b60005ae2c51a36a29cfe134bcacae2dd5cedcd4615fbaad1494b"
checksum = "d3ca019570363e800b05ad4fd890734f28ac7b72f563ad8a35079efb793616f8"
dependencies = [
"proc-macro2",
"quote",
Expand All @@ -337,9 +337,9 @@ dependencies = [

[[package]]
name = "bitfield-struct"
version = "0.11.0"
version = "0.12.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "d3ca019570363e800b05ad4fd890734f28ac7b72f563ad8a35079efb793616f8"
checksum = "8769c4854c5ada2852ddf6fd09d15cf43d4c2aaeccb4de6432f5402f08a6003b"
dependencies = [
"proc-macro2",
"quote",
Expand Down Expand Up @@ -3706,10 +3706,9 @@ dependencies = [
[[package]]
name = "igvm"
version = "0.4.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "67578b05ebcdfa1aa0fe13f77a13bdd7d87036128898a327f1bf8e7356cf09cd"
source = "git+https://github.com/microsoft/igvm?rev=3d1a950116d624746bf3342e09ea0a3416d89dd3#3d1a950116d624746bf3342e09ea0a3416d89dd3"
dependencies = [
"bitfield-struct 0.10.1",
"bitfield-struct 0.12.1",
"crc32fast",
"hex",
"igvm_defs",
Expand All @@ -3724,10 +3723,9 @@ dependencies = [
[[package]]
name = "igvm_defs"
version = "0.4.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "eedd8c64460676101062f9f2ecdeb52d8f43e622da6a6c5bf5158f4ef08b0906"
source = "git+https://github.com/microsoft/igvm?rev=3d1a950116d624746bf3342e09ea0a3416d89dd3#3d1a950116d624746bf3342e09ea0a3416d89dd3"
dependencies = [
"bitfield-struct 0.10.1",
"bitfield-struct 0.12.1",
"open-enum",
"static_assertions",
"zerocopy",
Expand Down
4 changes: 2 additions & 2 deletions Cargo.toml
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Expand Up @@ -613,8 +613,8 @@ iced-x86 = { version = "1.17", default-features = false, features = [
"no_xop",
"no_d3now",
] }
igvm = "0.4.0"
igvm_defs = { version = "0.4.0", default-features = false }
igvm = { git = "https://github.com/microsoft/igvm", rev = "3d1a950116d624746bf3342e09ea0a3416d89dd3" }
igvm_defs = { git = "https://github.com/microsoft/igvm", rev = "3d1a950116d624746bf3342e09ea0a3416d89dd3", default-features = false }
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mingweishih marked this conversation as resolved.
kvm-bindings = "0.14.0"
mshv-bindings = "0.6.8"
mshv-ioctls = "0.6.8"
Expand Down
6 changes: 6 additions & 0 deletions openvmm/openvmm_core/src/worker/vm_loaders/igvm.rs
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Expand Up @@ -855,6 +855,9 @@ fn load_igvm_x86(
IgvmDirectiveHeader::X64NativeVpContext { .. } => {
todo!("native igvm type not supported yet")
}
IgvmDirectiveHeader::AArch64CcaVpContext { .. } => {
todo!("AArch64 CCA VP context not supported yet")
}
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}
} else {
panic!("no relocation region, cannot filter to VTL2");
Expand Down Expand Up @@ -1192,6 +1195,9 @@ fn load_igvm_x86(
IgvmDirectiveHeader::X64NativeVpContext { .. } => {
todo!("native vp context not supported")
}
IgvmDirectiveHeader::AArch64CcaVpContext { .. } => {
todo!("AArch64 CCA VP context not supported")
}
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}
}

Expand Down
30 changes: 26 additions & 4 deletions vm/loader/igvmfilegen/src/file_loader.rs
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Expand Up @@ -831,21 +831,43 @@ impl<R: IgvmLoaderRegister + GuestArch + 'static> IgvmLoader<R> {
}
}

// Data size must match SNP VMSA size.
if data.len() != size_of::<SevVmsa>() {
anyhow::bail!("data len {:x} does not match VMSA size", data.len());
// The VP context builder produces the architectural VMSA
// (`x86defs::snp::SevVmsa`, 1648 bytes); the igvm crate's `SevVmsa`
// is padded out to a full 4K page, so accept input in the range
// [architectural size, padded size] and zero-pad it to the padded
// size before reading. Anything smaller than the architectural size
// would be silently zero-extended into a malformed VMSA, so reject
// it.
if data.len() < size_of::<x86defs::snp::SevVmsa>() {
anyhow::bail!(
"data len {:x} is smaller than the architectural VMSA size {:x}",
data.len(),
size_of::<x86defs::snp::SevVmsa>()
);
}
if data.len() > size_of::<SevVmsa>() {
anyhow::bail!(
"data len {:x} exceeds VMSA size {:x}",
data.len(),
size_of::<SevVmsa>()
);
}

// Page count must be 1.
if page_count != 1 {
anyhow::bail!("page count {page_count:x} for snp vmsa is not 1");
}

let mut padded = vec![0u8; size_of::<SevVmsa>()];
padded[..data.len()].copy_from_slice(data);

self.directives.push(IgvmDirectiveHeader::SnpVpContext {
gpa: page_base * PAGE_SIZE_4K,
compatibility_mask: DEFAULT_COMPATIBILITY_MASK,
vp_index: 0,
vmsa: Box::new(SevVmsa::read_from_bytes(data).expect("should be correct size")), // TODO: zerocopy: map_err (https://github.com/microsoft/openvmm/issues/759)
vmsa: Box::new(
SevVmsa::read_from_bytes(padded.as_slice()).expect("should be correct size"),
), // TODO: zerocopy: map_err (https://github.com/microsoft/openvmm/issues/759)
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});
} else {
for page in page_base..page_base + page_count {
Expand Down
18 changes: 18 additions & 0 deletions vm/loader/src/importer.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -263,6 +263,12 @@ pub enum Aarch64Register {
Pc(u64),
X0(u64),
X1(u64),
X2(u64),
X3(u64),
X4(u64),
X5(u64),
X6(u64),
X7(u64),
Cpsr(u64),
VbarEl1(u64),
Ttbr0El1(u64),
Expand All @@ -279,6 +285,12 @@ impl From<igvm::registers::AArch64Register> for Aarch64Register {
igvm_reg::Pc(v) => Aarch64Register::Pc(v),
igvm_reg::X0(v) => Aarch64Register::X0(v),
igvm_reg::X1(v) => Aarch64Register::X1(v),
igvm_reg::X2(v) => Aarch64Register::X2(v),
igvm_reg::X3(v) => Aarch64Register::X3(v),
igvm_reg::X4(v) => Aarch64Register::X4(v),
igvm_reg::X5(v) => Aarch64Register::X5(v),
igvm_reg::X6(v) => Aarch64Register::X6(v),
igvm_reg::X7(v) => Aarch64Register::X7(v),
igvm_reg::Cpsr(v) => Aarch64Register::Cpsr(v),
igvm_reg::SctlrEl1(v) => Aarch64Register::SctlrEl1(v),
igvm_reg::TcrEl1(v) => Aarch64Register::TcrEl1(v),
Expand All @@ -297,6 +309,12 @@ impl From<Aarch64Register> for igvm::registers::AArch64Register {
Aarch64Register::Pc(v) => igvm_reg::Pc(v),
Aarch64Register::X0(v) => igvm_reg::X0(v),
Aarch64Register::X1(v) => igvm_reg::X1(v),
Aarch64Register::X2(v) => igvm_reg::X2(v),
Aarch64Register::X3(v) => igvm_reg::X3(v),
Aarch64Register::X4(v) => igvm_reg::X4(v),
Aarch64Register::X5(v) => igvm_reg::X5(v),
Aarch64Register::X6(v) => igvm_reg::X6(v),
Aarch64Register::X7(v) => igvm_reg::X7(v),
Aarch64Register::Cpsr(v) => igvm_reg::Cpsr(v),
Aarch64Register::SctlrEl1(v) => igvm_reg::SctlrEl1(v),
Aarch64Register::TcrEl1(v) => igvm_reg::TcrEl1(v),
Expand Down
6 changes: 6 additions & 0 deletions vmm_core/vm_loader/src/initial_regs.rs
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Expand Up @@ -102,6 +102,12 @@ pub fn aarch64_initial_regs(
Aarch64Register::Pc(v) => state.registers.pc = v,
Aarch64Register::X0(v) => state.registers.x0 = v,
Aarch64Register::X1(v) => state.registers.x1 = v,
Aarch64Register::X2(v) => state.registers.x2 = v,
Aarch64Register::X3(v) => state.registers.x3 = v,
Aarch64Register::X4(v) => state.registers.x4 = v,
Aarch64Register::X5(v) => state.registers.x5 = v,
Aarch64Register::X6(v) => state.registers.x6 = v,
Aarch64Register::X7(v) => state.registers.x7 = v,
Aarch64Register::Cpsr(v) => state.registers.cpsr = v,
Aarch64Register::Ttbr0El1(v) => state.system_registers.ttbr0_el1 = v,
Aarch64Register::MairEl1(v) => state.system_registers.mair_el1 = v,
Expand Down
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