Add 12 peripheral definitions and MSPM0L111x support#34
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apullin wants to merge 5 commits intomspm0-rs:masterfrom
Open
Add 12 peripheral definitions and MSPM0L111x support#34apullin wants to merge 5 commits intomspm0-rs:masterfrom
apullin wants to merge 5 commits intomspm0-rs:masterfrom
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- SPI: Serial Peripheral Interface - RTC: Real-Time Clock - CRC: CRC accelerator - VREF: Voltage Reference - DAC: Digital-to-Analog Converter - COMP: Comparator - OPA: Operational Amplifier - AES: AES encryption accelerator - FLASHCTL: Flash controller - CANFD: CAN FD controller Each peripheral includes: - Transform file (transforms/*.yaml) for SVD cleanup - Register definition (data/registers/*_v1.yaml) - Mapping in perimap.rs Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
New parts: - MSPM0L1116: 64KB flash, 16KB RAM - MSPM0L1117: 128KB flash, 16KB RAM Packages: PT (LQFP-48), RGZ (VQFN-48), RHB (VQFN-32), RGE (VQFN-24) Note: L111x SYSCTL currently uses l110x_l130x_l134x variant. L111x has additional LFXT/HSCLK support that may warrant its own SYSCTL variant in a future update. Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
- Add SYSCTL variant for L111x with LFXT support (HSCLKEN, LFCLKCFG, LFXTCTL, EXLFCTL registers) and flash protection registers - Add INT_GROUP mapping for L111x (GROUP0: WWDT0, DEBUGSS, FLASHCTL, SYSCTL; GROUP1: GPIOA, GPIOB, TRNG) - Add EVENTLP peripheral definition - Add WUC (Wake Up Controller) peripheral definition - Add DEBUGSS peripheral definition - SYSMEM skipped as it has no registers in SVD Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
Delete NO_EFFECT/START and NO_EFFECT/CLR useless enum patterns, matching the cleanup standard used by other peripherals. Reduces eventlp_v1.yaml from 4667 to 2737 lines. Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
Add explanatory comments before enum deletions matching upstream TIM/ADC/UART patterns. Add publisher/subscriber port handling (CHANID cleanup, FPORT merge, FSUB arrays) to RTC, DAC, COMP, WUC. Add interrupt merge comments to RTC, DAC, COMP, AES, FLASHCTL, DEBUGSS. Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
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I think there is too much to merge at once here. I would be open to an individual pull request for L111x support. CANFD was already merged in #15 and I would generally prefer one pull request per peripheral unless two happen to be very tightly bound. |
i509VCB
reviewed
Feb 5, 2026
| @@ -1203,1543 +1203,1350 @@ fieldset/DIAGPAR0: | |||
| description: Writing a 1 will cause the safety diagnostic logic to generate a diagnostic check. | |||
| bit_offset: 0 | |||
| bit_size: 1 | |||
| enum: DIAGPAR0_ASSERTDIAG | |||
| fieldset/DIAGPAR1: | |||
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I think these DIAG registers are "internal" registers that TI uses for testing. You can just entirely delete these.
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Note: This is not necessarily a 100% serious PR. It was part of a skill builder to see if I could use Claude to scrape all datasheets and MD-ify them, as a supporting base for developing with MSPM0's. From there, I did a minimal in-place PAC to support https://github.com/apullin/freertos-in-rust-mspm0-demo . After finding this repo, I wanted to see if Claude could complete buildout of whatever was in the datasheets but not in the repo.
But all tests appear to pass. Let me know if any of this is a useful contribution.
Summary
Peripheral coverage
Before this PR, the repo covered ~12 peripheral types (UART, GPIO, DMA, I2C, TIM, ADC, WWDT, TRNG, etc.). This adds 12 more, bringing coverage to ~24 peripheral types.
Each transform is based on the G350x SVD extraction and includes:
MSPM0L111x
The L111x has LFXT support (LFXTCTL, EXLFCTL, HSCLKEN, LFCLKCFG) and flash protection registers not present in L110x/L130x, requiring its own SYSCTL variant. Interrupt groups derived from TI SDK IRQn_Type definitions.
Test plan
./d gensucceeds./d build-metapacsucceeds./d checkpasses all 222 chip variants with 0 errors