1.9.0

This is a major new release with the following changes:

• Code generation has been rewritten to enable faster elaboration and "just-in-time" compilation in the future.
• Now compatible with LLVM 16.
• Implemented the VHDL-2019 call path reporting API.
• The elsif VHDL-2019 conditional analysis directive now works correctly (#604).
• The 'transaction implicit signal no longer incurs a delta-cycle delay.
• x'ascending now reports the correct result if x has unconstrained array type and null range.
• The predefined "=" operator on record types now always uses the predefined equality comparison for fields even in the presence of a user-defined "=" operator.
• It is no longer necessary on Windows to link VHPI plugins at elaboration time with NVC_FOREIGN_OBJ. Use the --load option to load the plugin at run time as on other operating systems.
• The experimental --jit elaboration option defers native code generation until run time. This can dramatically reduce total test time for short-running simulations.
• Statements like wait for X where X is negative but not a constant now produce an error at run time (#633).
• NVC is now supported by VUnit.
• Implicit signal attributes like 'transaction are now considered static signal names (#640).
• Added support for fine-grained coverage collection via --coverage-spec elaboration option (from @Blebowski).
• The ABI for passing unconstrained arrays to foreign subprograms changed slightly, see the manual for details.
• Implemented new file I/O operations from VHDL-2019.
• Added analysis option --define to set user-defined conditional analysis identifiers (from @Blebowski).
• Optional support for using ZSTD to compress library files if libzstd-dev is installed.
• ISO-8859-1 extended characters are now handled properly in identifiers and when printing to the terminal.
• The new configure option --disable-default-paths disables the default library search paths (#652).
• Subtype indications used as case range choices no longer crash during analysis (#655).
• The default standard version was changed to VHDL-2002 and will likely change again to -2008 in a future release. Users are recommended to use the --std= option to specify an explicit standard revision to avoid any compatibility issues.
• Fixed a crash when elaborating a port map which contains a subtype of a record (#662).
• Implemented VHDL-2019 syntax relaxations for empty records and trailing semicolon in interface lists (from @bpadalino).
• A Bash auto-completion script is now installed by default. Run configure with --without-bash-completion to disable this.

Special thank you to @bpadalino, @tmeissner, @Blebowski, and @amb5l for sponsoring me!

1.8.2

This is a minor bug fix release for the following issues:

• Fixed "failed to suspend thread" crash on macOS.
• Fix incorrect coverage scope nesting with array case statements (from @Blebowski).
• Expressions like FOO(X)'DELAYED now work as expected rather than producing a fatal error (#603).
• Fixed a bug where data was not propagated through inout ports under certain conditions (#609).
• The -gNAME=VALUE option to set generic values from the command line now works correctly for subtypes of enumeration types (#618).
• Fixed a crash when creating an array of record subtypes where the subtype declaration has an element constraint (#615).

Special thank you to @bpadalino, @tmeissner, @Blebowski, and @amb5l for sponsoring me!

1.8.1

This is a minor release fixing the following two bugs:

• Initial signal values for certain types were not dumped correctly in FST files on Windows (#596).
• Missing thirdparty/str-two-way.h from distribution tarball (#599).

1.8.0

This is a major new release with many improvements and bug fixes, especially for VHDL-2008 features.

• The --disable-opt and --native elaborate options which were deprecated in version 1.3 have been removed.
• The JSON dumper which was unmaintained for several years has been removed.
• VHDL-2019 mode can be enabled with --std=2019. Please note there is very limited support for this standard at present.
• The new --no-save elaboration option skips saving the elaborated design and other generated files to the working library.
• Added support for else and elsif in generate statements (#510).
• Xilinx Vivado vendor libraries can now be compiled with nvc --install vivado.
• LLVM 8.0 or later is now required due to deprecation of non-opaque pointers.
• Altera/Intel Quartus vendor libraries can now be compiled with nvc --install quartus.
• The nvc --version output now includes the commit hash if built from a Git checkout.
• The new --gtkw run option writes a .gtkw save file for GtkWave containing all the signals in the design (suggested by @amb5l).
• libffi is now a build-time dependency.
• Negation of the smallest negative value of a type such as -integer'left now produces an error.
• Default OSVVM version updated to 2022.11.
• case .. generate statements are now supported in VHDL-2008.
• Coverage implementation was reworked and now collects statement,
  branch, expression and toggle metrics (from @Blebowski).
• The --make command is deprecated and will be repurposed in a later release. Use the new --print-deps command instead to generate Makefile dependencies.

Special thank you to @bpadalino, @tmeissner, @Blebowski, and @amb5l for sponsoring me!

1.7.2

This is bug fix release on the 1.7.2 branch and includes an important update for LLVM 15 compatibility.

• Fixed build on FreeBSD/arm (#534).
• Fixed crash with generic package instantiation (#520).
• Now compatible with LLVM 15.0.
• Fixed calculation of longest static prefix with 'RANGE expression (#542).
• MOD and REM are now defined for physical types in VHDL-2008 (#540).
• Signal declarations are now allowed in entity declarative part (#547).
• Protected objects are now allowed in concurrent procedure calls (#547).
• Opening a file with APPEND_MODE now actually appends to the file instead of truncating (#551).

Special thank you to @bpadalino, @tmeissner, @Blebowski, and @amb5l for sponsoring me!

1.7.1

This is a bug fix release on the 1.7 branch with the following changes:

• Added missing textio WRITE [LINE, REAL, STRING] in VHDL-2008.
• Added support for FreeBSD/powerpc (#503, #504, from @pkubaj).
• Fixed "missing vcode unit" error during elaboration (#502).
• Fixed crash with recursive entity instantiation (#502).
• Fixed error with expressions like X'ELEMENT'LENGTH (#508).
• Added support for FreeBSD/i386.
• Fixed crash reading resolved value of record signal (#502).
• Improved folding of for-generate expressions (#514).
• Fixed memory leak when forcing signals.
• Fixed crash with type conversion in generic map (#518).
• Fixed crash with expressions like X'DELAYED'STABLE (#517).
• External names now work with record signals (#520).
• Xilinx Vivado vendor libraries can now be compiled with nvc --install vivado.
• VITAL libraries are now built by default on Windows.
• Fixed build with old versions of Glibc.
• Resolution functions with nested record types now behave correctly (#516).
• Avoid repeated stat(2) calls when accessing library.
• Fixed very slow elaboration in some cases with function calls in generic map expressions.
• Fixed intermittent segfault during elaboration (#506).
• Fixed incorrect constant folding of case statements with range choices.
• Fixed crash with constrained array declared in entity.
• Real valued signals can now be dumped in FST files (#524).
• Fixed signal assignment delay with side effects being evaluated twice (#527).
• An error is now reported for duplicate choices in array-type case statements (#528).

Special thank you to @bpadalino, @tmeissner, @Blebowski and @amb5l for sponsoring me!

1.7.0

This is a major new release with significantly improved support for VHDL-2008.

• Breaking change: In-tree builds are no longer supported: use a separate build directory instead.
• Breaking change: The --force-init command is deprecated and has no effect.
• Added support for VHDL-2008 type generics on packages and entities.
• Diagnostic messages have been enhanced with more contextual information.
• Added support for record element constraints and record fields with unconstrained array types.
• Alias of multidimensional array allowed in VHDL-2008 mode.
• Implemented VHDL-2008 rules for aggregates with slices.
• VHPI is now always enabled at build time and the --enable-vhpi configure option has no effect.
• Arithmetic operations that overflow the underlying machine type now produce an error (#101).
• Added support for VHDL-2008 force/release assignments.
• Basic support for external names in VHDL-2008.
• Matching case case? statements are supported in VHDL-2008 mode.
• Fixed several bugs in the implementation of guarded signals.
• Implemented VHDL-2008 rules for generic visibility.
• Shared variable declaration permitted in entity declaration.
• Case expression no longer requires a locally static subtype in VHDL-2008 mode (#460).
• The VHDL heap is now garbage collected as required by VHDL-2019 and the deallocate operator has no effect other than setting the access to null.
• A new global option -H specifies the size of the simulation heap and defaults to 16 megabytes.
• Concurrent procedure call allowed in entity statement part.
• Added support for 'SUBTYPE and 'ELEMENT attributes in VHDL-2008.
• The new top-level --init command creates a new empty library directory.
• The -a analysis command now reads from the standard input if the file name is -.
• Added support for array element constraints in VHDL-2008.
• The --prefer-explicit analysis option which was deprecated before the 1.0 release has been removed.
• A new --relaxed analysis option enables "relaxed rules" mode. This has the same effect as enabling all the existing --relax= options. However some constructs will still produce warnings.
• The --relax= analysis option is deprecated and is now equivalent to passing --relaxed. The individual options are ignored.
• Added support for generic subprograms in VHDL-2008.
• New command --install allows easy installation of common third-party packages such as OSVVM and UVVM.
• Identifiers in waveform dumps are now in lower case instead of upper case.
• The function CURRENT_DELTA_CYCLE in NVC.SIM_PKG can be used to query the current delta cycle number.

Special thank you to @bpadalino and @tmeissner for sponsoring me!

1.6.2

This is a bug fix release on the 1.6 branch.

• Fix make -j with GNU make (#440).
• Subtraction from zero could return the wrong result in some circumstances.
• Fix incorrect code generation for access-to-array.
• Fix assertion failure with nested context.
• Generic declarations are now allowed to hide the entity name.
• Fix spurious error about duplicate declarations when using VHDL-2008 context declarations.
• Fix incorrect default generic value when component and entity specify generics in different order (#448).
• Postponed processes with sensitivity lists now work correctly.
• Unit tests no longer fail when built without debug symbols (#445).
• Simulation now correctly terminates when time reaches TIME'HIGH.
• Assertion failure and report messages were not printed during the initialisation phase of the simulation.

1.6.1

This is a minor bug fix release on the 1.6 branch.

• Fix compatibility with BSD make (#440).
• Fix an out-of-memory condition when initialising processes (#441).
• Fix incorrect generic value in binding specification (#442).
• Fix spurious error in overload resolution if required arguments follow optional arguments (#443).
• Fix intermittent crash generating code for enumerated types (#444).
• Minor elaboration performance optimisation.

1.6.0

This is a major new release containing a large number of new features and improvements.

• Name resolution and overload resolution has been completely rewritten which should fix a number of long-standing issues.
• The elaboration phase was largely written which fixes a number of long-standing issues and significantly improves elaboration speed.
• VHDL-2008 IEEE standard libraries are now built and installed in addition to the VHDL-1993 libraries.
• The VHDL-1993 standard libraries are now derived from the Apache 2.0 licensed sources from VHDL-2019.
• There is now a project website at https://www.nickg.me.uk/nvc/. Please link to this in preference to the GitHub project page.
• Compiled VHDL code now includes DWARF debug information which is used for runtime stack trace if libdw or libdwarf is installed.
• Added support for VHDL-2008 reduction operators, match operators, and condition conversion.
• Added support for VHDL-2008 element resolution.
• Variable assignment now supports aggregate targets.
• The --relax=impure option allows pure functions to call impure functions.
• Added support for VHDL-2008 "all" sensitised processes.
• Added support for ports and generics in block statements.
• Added support for the 'BASE attribute.
• Type name now allowed in element association choice (#407).
• Implement textio READ procedure for REAL.
• LLVM 6.0 or later is now required to build.
• Added support for MINIMUM, MAXIMUM, and TO_STRING predefined operators in VHDL-2008.
• VCD files are now generated from FST data in a similar manner to fst2vcd(1). This should improve compatibility with other tools.
• Added support for 'LAST_ACTIVE attribute (#423).
• Added support for 'DRIVING and 'DRIVING_VALUE attributes.
• Added a new option --ieee-warnings=off to disable warning messages from the standard IEEE packages.
• Support for configurations has been significantly improved (#372).
• Added support for VHDL-2008 delimited comments.
• Added support for guard expressions on blocks.
• Added support for guarded signals.
• Added support for HREAD, HWRITE, and other TEXTIO additions in VHDL-2008.
• Code generation now happens in parallel when LLVM is built with multi-threading enabled.
• Link time optimisation (LTO) is now enabled for release builds where supported.
• The default assertion failure message for certain simple scalar comparisons now shows the values of the left and right hand sides.
• Added support for VHDL-2008 conditional variable assignment statements.
• Added support for VHDL-2008 extended bit string literals.
• Non-globally-static actuals allowed in port maps in VHDL-2008 mode.
• Added support for VHDL-2008 sequential conditional signal assignment statements.
• Added basic support for package generics and package instantiation.
• Nested arrays can now be included in the waveform dump but only if the --dump-arrays option is passed. This is disabled my default due the significant performance and memory overhead.
• Added support for record types in waveform dump (#216).
• Added support for foreign subprograms using the VHPIDIRECT protocol.
• Library build is now reproducible when running make -j.
• Fix a constant folding crash with nested records.
• Fixed a crash when a record aggregate contains an "others" association and the fields have array types with different lengths.
• Fixed a stack overflow when a subprogram with unconstrained array arguments is called repeatedly in a loop (#414).
• Fixed intermittent crash when evaluating nested constant records (#425).
• Fixed missing import libraries on Windows (#424).
• Standard libraries are now installed under $prefix/lib/nvc/ instead of $prefix/share/nvc.
• New configure option --disable-vital disables building the VITAL packages whose license status is unclear.
• Support for the LXT wave output format, which was deprecated in version 1.5, has been removed. Use the default FST format instead.
• The fetch-ieee.sh script which did nothing since the last release has been removed.
• The --codegen command, which has been deprecated since 1.3, was removed.
• The --profile option now prints internal simulation statistics instead of the top processes by CPU time.