[Spike] Fix #2579: Require explicit Zifencei in ISA to enable fence.i instruction. #2580
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The PR work after changing spike_yaml cool, but I prefer to wait a PR to fix RTL bug. |
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JeanRochCoulon
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Feb 11, 2025
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Spike part of fix to CVA6 issue openhwgroup/cva6#2734.
Spike code explicitly assumed
Zifenceias being present for backward compatibility, cf. the diff onisa_parser.cc.This request changes the original Spike behavior to require the explicit inclusion of
Zifenceiin the ISA string to enable thefence.iinstruction.