Fully support the Write-Back mode of the HPDcache in the CVA6 #2691
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* There are new cache subsystem subtypes: HPDCACHE_WT, HPDCACHE_WB, or
HPDCACHE_WT_WB
* HPDCACHE_WT uses the HPDcache with the write-through policy
* HPDCACHE_WB uses the HPDcache with the write-back policy
* HPDCACHE_WT_WB uses the HPDcache with both write-trough and
write-back policies
* New parameter to indicate if the Dcache shall be flushed on a fence
instruction
* New parameter to indicate if the Dcache shall be invalidated after
flushing the cachelines
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This PR modifies some components in the CVA6 to fully support the WB mode of the HPDcache.
When on WB mode, there may be coherency issues between the Instruction Cache and the Data Cache. This may happen when the software writes on instruction segments (e.g. to relocate a code in memory).
This PR contains the following modifications:
In addition, it also fixes some issues with the rvfi_mem_paddr signal from the store_buffer.