Make PMP disableable #2692
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Make PMP disableable #2692
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core/cva6_mmu/cva6_ptw.sv
Outdated
| .PLEN (CVA6Cfg.PLEN), | ||
| .PMP_LEN (CVA6Cfg.PLEN - 2), | ||
| .NR_ENTRIES(CVA6Cfg.NrPMPEntries) | ||
| .CVA6Cfg (CVA6Cfg) |
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[verible-verilog-format] reported by reviewdog 🐶
Suggested change
| .CVA6Cfg (CVA6Cfg) | |
| .CVA6Cfg(CVA6Cfg) |
core/load_store_unit.sv
Outdated
| @@ -148,9 +148,9 @@ module load_store_unit | |||
| input amo_resp_t amo_resp_i, | |||
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| // PMP configuration - CSR_REGFILE | |||
| input riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries-1:0] pmpcfg_i, | |||
| input riscv::pmpcfg_t [(CVA6Cfg.NrPMPEntries > 0 ? CVA6Cfg.NrPMPEntries-1 : 0):0] pmpcfg_i, | |||
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[verible-verilog-format] reported by reviewdog 🐶
Suggested change
| input riscv::pmpcfg_t [(CVA6Cfg.NrPMPEntries > 0 ? CVA6Cfg.NrPMPEntries-1 : 0):0] pmpcfg_i, | |
| input riscv::pmpcfg_t [(CVA6Cfg.NrPMPEntries > 0 ? CVA6Cfg.NrPMPEntries-1 : 0):0] pmpcfg_i, |
core/pmp/src/pmp.sv
Outdated
| parameter int unsigned PLEN = 34, // rv64: 56 | ||
| parameter int unsigned PMP_LEN = 32, // rv64: 54 | ||
| parameter int unsigned NR_ENTRIES = 4 | ||
| parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty |
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[verible-verilog-format] reported by reviewdog 🐶
Suggested change
| parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty | |
| parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty |
core/pmp/src/pmp_data_if.sv
Outdated
| .PLEN (CVA6Cfg.PLEN), | ||
| .PMP_LEN (CVA6Cfg.PLEN - 2), | ||
| .NR_ENTRIES(CVA6Cfg.NrPMPEntries) | ||
| .CVA6Cfg (CVA6Cfg) |
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[verible-verilog-format] reported by reviewdog 🐶
Suggested change
| .CVA6Cfg (CVA6Cfg) | |
| .CVA6Cfg(CVA6Cfg) |
core/cva6_mmu/cva6_ptw.sv
Outdated
| .PLEN (CVA6Cfg.PLEN), | ||
| .PMP_LEN (CVA6Cfg.PLEN - 2), | ||
| .NR_ENTRIES(CVA6Cfg.NrPMPEntries) | ||
| .CVA6Cfg (CVA6Cfg) |
There was a problem hiding this comment.
[verible-verilog-format] reported by reviewdog 🐶
Suggested change
| .CVA6Cfg (CVA6Cfg) | |
| .CVA6Cfg(CVA6Cfg) |
core/load_store_unit.sv
Outdated
| @@ -148,9 +148,9 @@ module load_store_unit | |||
| input amo_resp_t amo_resp_i, | |||
|
|
|||
| // PMP configuration - CSR_REGFILE | |||
| input riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries-1:0] pmpcfg_i, | |||
| input riscv::pmpcfg_t [(CVA6Cfg.NrPMPEntries > 0 ? CVA6Cfg.NrPMPEntries-1 : 0):0] pmpcfg_i, | |||
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[verible-verilog-format] reported by reviewdog 🐶
Suggested change
| input riscv::pmpcfg_t [(CVA6Cfg.NrPMPEntries > 0 ? CVA6Cfg.NrPMPEntries-1 : 0):0] pmpcfg_i, | |
| input riscv::pmpcfg_t [(CVA6Cfg.NrPMPEntries > 0 ? CVA6Cfg.NrPMPEntries-1 : 0):0] pmpcfg_i, |
core/pmp/src/pmp.sv
Outdated
| parameter int unsigned PLEN = 34, // rv64: 56 | ||
| parameter int unsigned PMP_LEN = 32, // rv64: 54 | ||
| parameter int unsigned NR_ENTRIES = 4 | ||
| parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty |
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[verible-verilog-format] reported by reviewdog 🐶
Suggested change
| parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty | |
| parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty |
core/cva6_mmu/cva6_ptw.sv
Outdated
| .PLEN (CVA6Cfg.PLEN), | ||
| .PMP_LEN (CVA6Cfg.PLEN - 2), | ||
| .NR_ENTRIES(CVA6Cfg.NrPMPEntries) | ||
| .CVA6Cfg (CVA6Cfg) |
There was a problem hiding this comment.
[verible-verilog-format] reported by reviewdog 🐶
Suggested change
| .CVA6Cfg (CVA6Cfg) | |
| .CVA6Cfg(CVA6Cfg) |
core/load_store_unit.sv
Outdated
| @@ -148,9 +148,9 @@ module load_store_unit | |||
| input amo_resp_t amo_resp_i, | |||
|
|
|||
| // PMP configuration - CSR_REGFILE | |||
| input riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries-1:0] pmpcfg_i, | |||
| input riscv::pmpcfg_t [(CVA6Cfg.NrPMPEntries > 0 ? CVA6Cfg.NrPMPEntries-1 : 0):0] pmpcfg_i, | |||
There was a problem hiding this comment.
[verible-verilog-format] reported by reviewdog 🐶
Suggested change
| input riscv::pmpcfg_t [(CVA6Cfg.NrPMPEntries > 0 ? CVA6Cfg.NrPMPEntries-1 : 0):0] pmpcfg_i, | |
| input riscv::pmpcfg_t [(CVA6Cfg.NrPMPEntries > 0 ? CVA6Cfg.NrPMPEntries-1 : 0):0] pmpcfg_i, |
core/cva6_mmu/cva6_ptw.sv
Outdated
| .PLEN (CVA6Cfg.PLEN), | ||
| .PMP_LEN (CVA6Cfg.PLEN - 2), | ||
| .NR_ENTRIES(CVA6Cfg.NrPMPEntries) | ||
| .CVA6Cfg (CVA6Cfg) |
There was a problem hiding this comment.
[verible-verilog-format] reported by reviewdog 🐶
Suggested change
| .CVA6Cfg (CVA6Cfg) | |
| .CVA6Cfg(CVA6Cfg) |
|
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niwis
added a commit
to pulp-platform/cva6
that referenced
this pull request
Jan 15, 2025
PR openhwgroup#2692 changed the bus width for `pmpcfg` and `pmpaddr` in most modules. Do the same in `cva6_mmu` and `cva6_ptw` to fix port width mismatches. Signed-off-by: Nils Wistoff <[email protected]>
niwis
added a commit
to niwis/ariane
that referenced
this pull request
Jan 15, 2025
PR openhwgroup#2692 changed the bus width for `pmpcfg` and `pmpaddr` in most modules. Do the same in `cva6_mmu` and `cva6_ptw` to fix port width mismatches. Signed-off-by: Nils Wistoff <[email protected]>
JeanRochCoulon
pushed a commit
that referenced
this pull request
Jan 15, 2025
PR #2692 changed the bus width for `pmpcfg` and `pmpaddr` in most modules. Do the same in `cva6_mmu` and `cva6_ptw` to fix port width mismatches.
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The PMP can be disabled by setting NrPMPEntries at 0.