8346706: RISC-V: Add available registers to hs_err #22845

robehn · 2024-12-20T11:17:54Z

Hi please consider.

This adds below to hs_err:

Floating point state:
fcsr=1
Floating point registers:
f0=0xffffffff44a72000 | 1.84467e+19
f1=0xffffffff44a72000 | 1.84467e+19
....
f31=0xffffffff44a72000 | 1.84467e+19

Vector state:
vstart=0x0000000000000000
vl=0x0000000000000020
vtype=0x0000000000000000
vcsr=0x0000000000000000
vlenb=0x0000000000000020
Vector registers:
v0=0x0101010101010101010101010101010101010101010101010101010101010101
....
v31=0x0101010101010101010101010101010101010101010101010101010101010101

To get vector the headers need to include those structures, hence build files hackery.
This means if you compile on a kernel without RVV support the error handler will lack support for it.
We don't care about RVV option as carshing in native may still use vector even if the jit do not.

I'm doubt full about the printing as double for fp regs, maybe that should be removed.

Local testing, running t1 over weekend.

Thanks, Robbin

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Issue

JDK-8346706: RISC-V: Add available registers to hs_err (Enhancement - P4)

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Hamlin Li (@Hamlin-Li - Reviewer)
Magnus Ihse Bursie (@magicus - Reviewer) Review applies to 5cb8c776
Fei Yang (@RealFYang - Reviewer)

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bridgekeeper · 2024-12-20T11:18:33Z

👋 Welcome back rehn! A progress list of the required criteria for merging this PR into master will be added to the body of your pull request. There are additional pull request commands available for use with this pull request.

openjdk · 2024-12-20T11:18:39Z

@robehn This change now passes all automated pre-integration checks.

ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details.

After integration, the commit message for the final commit will be:

8346706: RISC-V: Add available registers to hs_err

Reviewed-by: mli, fyang, ihse

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At the time when this comment was updated there had been 46 new commits pushed to the master branch:

33f9be8: 8347083: Incomplete logging in nsk/jvmti/ResourceExhausted/resexhausted00* tests
8eddf67: 8346887: DrawFocusRect() may cause an assertion failure
a46ae70: 8339728: [Accessibility,Windows,JAWS] Bug in the getKeyChar method of the AccessBridge class
97dd06c: 8347299: Add annotations to test cases in LicenseTest
0a35ebf: 8347297: Skip the RuntimeImageSymbolicLinksTest test on Windows when it is executed outside of the jtreg
b3e8736: 8347296: WinInstallerUiTest fails in local test runs if the path to test work directory is longer that regular
1ade96b: 8347042: Remove an extra parenthesis in macro definition in jfrTraceIdMacros.hpp
db7fa6a: 8347289: HKDF delayed provider selection failed with non-extractable PRK
0a5ef82: 8347162: Update problemlist CR for vmTestbase/nsk/jdi/VMOutOfMemoryException
ea49537: 8310340: assert(_thread->is_interp_only_mode() || stub_caller) failed: expected a stub-caller
... and 36 more: https://git.openjdk.org/jdk/compare/08debd335e9160d20b87e06a2e83ddedd5f473b8...master

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openjdk · 2024-12-20T11:19:17Z

@robehn The following labels will be automatically applied to this pull request:

build
hotspot-runtime

When this pull request is ready to be reviewed, an "RFR" email will be sent to the corresponding mailing lists. If you would like to change these labels, use the /label pull request command.

robehn · 2024-12-20T11:21:15Z

Could @erikj79 or @magicus please look the build changes please, thanks!

mlbridge · 2024-12-20T11:24:53Z

Webrevs

make/hotspot/lib/CompileJvm.gmk

Hamlin-Li

Thanks for adding this, it's helpful!

Some minor comments on riscv code.

src/hotspot/os_cpu/linux_riscv/os_linux_riscv.cpp

magicus

Build changes look okay. I did not look at hotspot changes so you'll need two reviewers for that as usual.

src/hotspot/os_cpu/linux_riscv/os_linux_riscv.cpp

RealFYang

Seems fine to me. Thanks for the update.

Hamlin-Li

Looks good, Thanks!

robehn · 2025-01-09T11:24:32Z

Thanks!

robehn · 2025-01-09T11:24:40Z

/integrate

openjdk · 2025-01-09T11:25:38Z

Going to push as commit 765b9e6.
Since your change was applied there have been 49 commits pushed to the master branch:

d66737e: 8341097: GHA: Demote Mac x86 jobs to build only
dff5719: 8347126: gc/stress/TestStressG1Uncommit.java gets OOM-killed
82e16ba: 8347268: [ubsan] logOutput.cpp:357:21: runtime error: applying non-zero offset 1 to null pointer
33f9be8: 8347083: Incomplete logging in nsk/jvmti/ResourceExhausted/resexhausted00* tests
8eddf67: 8346887: DrawFocusRect() may cause an assertion failure
a46ae70: 8339728: [Accessibility,Windows,JAWS] Bug in the getKeyChar method of the AccessBridge class
97dd06c: 8347299: Add annotations to test cases in LicenseTest
0a35ebf: 8347297: Skip the RuntimeImageSymbolicLinksTest test on Windows when it is executed outside of the jtreg
b3e8736: 8347296: WinInstallerUiTest fails in local test runs if the path to test work directory is longer that regular
1ade96b: 8347042: Remove an extra parenthesis in macro definition in jfrTraceIdMacros.hpp
... and 39 more: https://git.openjdk.org/jdk/compare/08debd335e9160d20b87e06a2e83ddedd5f473b8...master

Your commit was automatically rebased without conflicts.

openjdk · 2025-01-09T11:25:46Z

@robehn Pushed as commit 765b9e6.

💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored.

Baseline

5b405e5

openjdk bot added hotspot-runtime [email protected] build [email protected] labels Dec 20, 2024

Fixed ws

64f79ef

openjdk bot added the rfr Pull request is ready for review label Dec 20, 2024

magicus reviewed Dec 20, 2024

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Hamlin-Li reviewed Dec 20, 2024

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robehn added 2 commits December 20, 2024 18:19

Make file fixes

a52a390

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magicus approved these changes Dec 20, 2024

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openjdk bot added the ready Pull request is ready to be integrated label Dec 20, 2024

RealFYang reviewed Dec 30, 2024

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robehn added 2 commits January 7, 2025 08:56

Merge branch 'master' into vregs

5cb8c77

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openjdk bot removed the ready Pull request is ready to be integrated label Jan 7, 2025

RealFYang approved these changes Jan 9, 2025

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robehn deleted the vregs branch January 9, 2025 11:32

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8346706: RISC-V: Add available registers to hs_err #22845

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8346706: RISC-V: Add available registers to hs_err #22845

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