Inference revolution + Improvements to inference transparency

[VonTum]

Switch to a new inference system, combining both regular port inference with latency count inference. This allows us to make the inference process MUCH more transparent, such that the compiler can tell you why a specific inference wasn't successful.

Hover info Example:

module SameCycleReadFIFO #(T: type bool #()[20], DEPTH: 64, MAY_PUSH_LATENCY: 22, EXTRA_IN_FLIGHT: 2):    action rst'1000
    output bool #() may_push'-22
    action push'0: bool #()[20] push_data'0
    output bool #() may_pop'0
    action pop'0 -> bool #()[20] pop_data'0
T can be inferred from:
{*} <: T in T push_data
{*} = T in T pop_data
DEPTH has no acceptable inference candidates
MAY_PUSH_LATENCY can be inferred as an integer value that is as low as possible, without violating any of the following constraints:
    MAY_PUSH_LATENCY * -1 <= may_push'{*} - push_data'{*}  ({*} = -22)
    MAY_PUSH_LATENCY * -1 <= may_push'{*} - push'{*}  ({*} = -22)
EXTRA_IN_FLIGHT has no acceptable inference candidates

Related to #87, but because the answer to this issue isn't known yet, that issue stays open

Incidentally this Resolves #89