feat: Ornith Hub 4bit load + SuffixSpec SCORE gate - #179
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Gate on quant recipe (not only mtplx_policy) so layout-compatible checkpoints can open; cast BF16 scales/biases to F16 by dtype so Metal half kernels stay correct without path- or name-based switches. Co-authored-by: Cursor <cursoragent@cursor.com>
Port dense/chibi levers so wide drafts don't pay verify on low-accept regimes (agentic/longctx), while Spec can still win on code/longctx. Trunc uses unsmoothed C so Laplace smoothing doesn't empty singleton drafts. Ornith A/B: defaults r=478‰, DRAFT_K=96 → 3/4 regimes ≥90 tok/s. Co-Authored-By: Cursor <cursoragent@cursor.com>
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Summary
Enable Ornith / mlx-community-style Hub 4-bit checkpoints (MTPLX-equivalent quant recipe, not only
mtplx_policy) and normalize BF16 scales/biases to F16 at load so Seedless Metalhalfbindings stay coherent. Also port SuffixSpec SCORE / trunc / adaptive-K so wide drafts do not pay verify tax on low-accept regimes; Ornith 4-regime A/B lands 3/4 ≥90 tok/s (agentic still ~85 on the AR floor).Related issue
N/A (Ornith enablement + Spec feedback port; agentic-floor follow-up is a separate branch)
Verification
ModelStore.selfCheckgate cases (stamp / ornith recipe / reject nail & uniform-4bit)scripts/test_raw.sh(RAWTESTS) on this machine after merge if CI does not cover GPUNotes for reviewer
modelID.ROWCOST=478, residentDRAFT_K=96, SCORE+trunc+adaptive-K on. Speed-only; lossless either way.m1-floor/ chain floor).Made with Cursor