chore(deps): update bundled llama.cpp engine to v10054 - autoclosed - #344
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This PR contains the following updates:
b9946→b10054b10068(+9)Automated engine bump. The Engine Regression Gate is the hard check on this PR. If it reports a dylib closure change, check out this branch, run
bun run engine:ensure(it prints the exact frameworks diff), updatesrc-tauri/tauri.conf.jsonto match, and push.Release Notes
ggml-org/llama.cpp (ggml-org/llama.cpp)
vb10054Compare Source
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docs: added a note about using OpenCl with Adreno 810 (#25786)
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openEuler:
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hexagon: L2 cache handling rework (dirty bit tracking with lazy flushing) and more MUL_MAT updates (#25762)
hex-mm: fix artificial limit in the solver that restricted number of act-prep threads
hex-mm: fix warning
hex-prof: do not apply --top to the timeline report
hmx-mm: add suport for tiled act-processing to better distribute hvx work
hex-l2: add tracing for l2flush events
workqueue: redo the legacy workpool api to match hmx-queue and dma-queue
hmx-mm: fix f32 activation buffer alignmnet for nhvx=5,6,7
hex-work: minor cleanup for work-queue apis
hex-work: further cleanup of the work-queue api
hex-l2: optimize l2flushes at the opbatch level
hex-work: remove unused mask
hex-work: no need to drop hvx ctx in the work-queue
hex-work: add explicit wakeup/suspend and make threads spin
hex-bufs: mark any non-weight tensor as compute
hex-dma: dma-queue support for alias queues and cached dma
hex-l2: track tensor aliases and delay or skip flushes as much as possible
hex-l2: simplify tensor alias handling
hex-l2: handle overlapping views as a circular list of aliases
hex-tens: add flags helper
hex-l2: add helper for marking tensors clearn/dirty
hex-l2: mark binary and rope outputs as l2-clean and keep the rest as is for now
hex-l2: proper support for handling all tensor overlap scenarios
hex-trace: instrument matmul init code and cleanup trace checks
hex-thread: introduce dedicated main thread with explicit stack and priority
hex-l2: track dirty state as bitmap and introduce threaded flush
hex-trace: remove redundant checks for ctx != null
hex-l2: allocate entire context as one buffer and l2fetch it after big flushes
hex-l2: disable tensor clearing in binary and rope for now seems to cause issues with fusion
hmx-mm: update act proc to use fastdivs and fix DMA overflow
hmx-mm: make MUL_MAT_ID kernels robust to multi-chunk cases (start_row>0)
hex-queue: remove obsolete queue interfaces and flush hmx-queue at the end of the op-batch
hex-queue: dont use early wakeup for small op-batches
hex-tensors: properly cap max_tensors in op-batches and dirty_map
hex-l2: make sure threaded l2flush does proper rounding
hex-l2: factor out htp_tensor_flush for reuse (if needed)
hex-l2: optimize tensor flushes by coalescing flush-all
hex-l2: optimize multi-threaded flush
hex-drv: futureproof version checks
hexagon: fix errors and warnings on windows
hex-main: update main thread to only use dspqueue_read, dspqueue_peek is not available on some platforms
hex-main: add fallback mode for dspqueue with callbacks
hex-main: introduce fallback mode for using dspqueue callbacks for full op processing
hex-main: remove early wakeup, not helping and seems to cause some errors with certain batch sizes
hex-l2: make sure to use invalidate version of flushall
hex-l2: dont try to trace early l2flush at the start of op-batch
hex-main: remove offset_ctx that must be zero anyway
hex-hmx: fix hmx_queue_depth to use idx_write - idx_read
hex-hmx: use atomic_load for idx_read/write
hex-main: add static assert to make sure n_threads are aligned
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kleidiai: Add SME vs SME2 distinction in kernel dispatch (#25478)
The current integration treats SME as a single capability (CPU_FEATURE_SME)
with no distinction between SME(v1) and SME2. The kernels dispatched under
CPU_FEATURE_SME use SME2-specific instructions, making dispatch incorrect
on SME(v1)-only hardware.
We introduce build-time and runtime distinction between SME and SME2, and
wire SME(v1) and SME2 kernels based on actual hardware support.
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vulkan: when using transfer queue for async copies, sync on event_wait to avoid race (#25229)
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TP: fix Phi3, Bert, Plamo2/3, ChatGLM (#25536)
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vendor: update BoringSSL to 0.20260713.0 (#25624)
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tests: actually exercise
test-recurrent-state-rollback(#25758)Website:
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server : allow text-only slot save/restore with mtmd (#25076)
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CUDA: Support CUDA Virtual Devices (#25228)
support cuda virtual devices
disable NCCL path when virtual devices are used
label virtual devices in description; add GPUx2 server CI jobs
code refactor
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Enable CUDA graphs on volta+turing (#25749)
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server: Ignore empty / non-existing
Originheaders (#25756)Otherwise this gives lots of unnecessary warnings:
W srv operator(): (CORS) skip non-localhost origin:
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ggml-cuda : restore prop.integrated on HIP builds (#24233)
PR #16308 set info.devices[id].integrated = false unconditionally for all
CUDA/HIP devices as a workaround for corrupted output on Jetson Orin
(#15034). On HIP/ROCm the device's real hipDeviceProp_t.integrated flag is
needed: with the cached field forced to false, supports_buft() refuses
CUDA host buffers on AMD APU/UMA parts, while get_type() already reads
prop.integrated (#23007) — an inconsistency that breaks integrated-GPU
host-buffer use on ROCm.
Guard the workaround so it only applies to non-HIP (CUDA) builds and
restore prop.integrated for HIP, keeping the Jetson workaround intact for
CUDA.
Fixes #23977
Signed-off-by: liminfei-amd 91481003+liminfei-amd@users.noreply.github.com
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ci : add official website link to release notes (#25728)
Assisted-by: pi:llama.cpp/Qwen3.6-27B
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