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feat: add mcp2515 for q6a #484

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Merged
RadxaYuntian merged 1 commit into from
Dec 8, 2025
+63 −0
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feat: add mcp2515 for q6a #484

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1 change: 1 addition & 0 deletions arch/arm64/boot/dts/qcom/overlays/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-radxa-dragon-q6a-cam1-imx577.dtbo \
qcs6490-radxa-dragon-q6a-spi12-waveshare35b.dtbo \
qcs6490-radxa-dragon-q6a-spi6-cs0-spidev.dtbo \
qcs6490-radxa-dragon-q6a-spi7-cs0-spidev.dtbo \
qcs6490-radxa-dragon-q6a-spi12-cs0-mcp2515-8mhz.dtbo \
qcs6490-radxa-dragon-q6a-spi12-cs0-spidev.dtbo \
qcs6490-radxa-dragon-q6a-spi14-cs0-spidev.dtbo \
qcs6490-radxa-dragon-q6a-uart6-flowctl.dtbo \
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62 changes: 62 additions & 0 deletions arch/arm64/boot/dts/qcom/overlays/qcs6490-radxa-dragon-q6a-spi12-cs0-mcp2515-8mhz.dtso
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@@ -0,0 +1,62 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2025 Radxa Computer (Shenzhen) Co., Ltd.
*/

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
metadata {
title = "Enable MCP2515 with 8MHz external clock on SPI12 over CS0";
compatible = "radxa,dragon-q6a";
category = "misc";
exclusive = "spi12", "uart12", "i2c12", "gpio48", "gpio49", "gpio50", "gpio51", "GPIO_57";
description = "Enable MCP2515 with 8MHz external clock on SPI12 over CS0.

Provide support for Microchip MCP2515 SPI CAN controller.
Assumes 8MHz external clock.
Uses Pin 22 (GPIO_57) for INT.";
};
};

&i2c12 {
status = "disabled";
};

&uart12 {
status = "disabled";
};

&spi12 {
qcom,enable-gsi-dma;
status = "okay";
max-freq = <1000000>;
#address-cells = <1>;
#size-cells = <0>;

can0: mcp2515@0 {
compatible = "microchip,mcp2515";
status = "okay";
reg = <0>;
spi-max-frequency = <1000000>;

interrupt-parent = <&tlmm>;
interrupts = <57 IRQ_TYPE_EDGE_FALLING>;

clocks = <&can0_osc>;
vdd-supply = <&vcc_3v3>;
xceiver-supply = <&vcc_3v3>;
};
};

&{/} {
can0_osc: can0-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <8000000>;
};
};