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@riscv-non-isa

RISC-V Non-ISA Specifications

The Open-Standard Instruction Set Architecture

Welcome to the RISC-V Non-ISA Specifications 👋

RISC-V Logo

Non-ISA specifications do not add new instructions, create or change opcodes, or in any way modify the RISC-V ISA. They do help us to develop an ecosystem around the ISA Specifications.

Things you'll find here include:

  • ABI Documentation
  • Architecture Tests
  • Specifications like Debug, Processor Trace, and Software Interrupts

If you don't find what you're looking for here, try one of our other GitHub organizations:

Popular repositories Loading

  1. riscv-asm-manual riscv-asm-manual Public

    RISC-V Assembly Programmer's Manual

    Makefile 1.5k 244

  2. riscv-elf-psabi-doc riscv-elf-psabi-doc Public

    A RISC-V ELF psABI Document

    Python 742 165

  3. riscv-arch-test riscv-arch-test Public

    Assembly 538 221

  4. riscv-sbi-doc riscv-sbi-doc Public

    Documentation for the RISC-V Supervisor Binary Interface

    Makefile 379 95

  5. rvv-intrinsic-doc rvv-intrinsic-doc Public

    C 310 91

  6. riscv-trace-spec riscv-trace-spec Public

    RISC-V Processor Trace Specification

    C 170 50

Repositories

Showing 10 of 35 repositories
  • riscv-toolchain-conventions Public

    Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains

    riscv-non-isa/riscv-toolchain-conventions’s past year of commit activity
    Makefile 148 CC-BY-4.0 41 14 11 Updated Feb 20, 2025
  • iopmp-spec Public

    This repository contains the specification source for the RISC-V IOPMP Specification. This document proposes a Physical Memory Protection Unit of Input/Output devices, IOPMP for short, to regulate the accesses issued from the bus masters.

    riscv-non-isa/iopmp-spec’s past year of commit activity
    Makefile 23 CC-BY-4.0 6 0 2 Updated Feb 19, 2025
  • riscv-cbqri Public

    This repo holds the work area and revisions of a QoS register interface for caches and memory controllers specification. The QoS register interface is a non-ISA specification that supports configuring resource allocations to applications and monitoring the resource usage by applications.

    riscv-non-isa/riscv-cbqri’s past year of commit activity
    Makefile 4 CC-BY-4.0 8 0 0 Updated Feb 19, 2025
  • riscv-iommu Public

    RISC-V IOMMU Specification

    riscv-non-isa/riscv-iommu’s past year of commit activity
    C 103 CC-BY-4.0 17 3 3 Updated Feb 19, 2025
  • server-soc Public

    The repo holds the draft non-ISA Server SoC specification being developed by the Server SoC specification TG and to release intermediate releases of the specification on milestones. Further downstream this repo will be used to release specifications for public review.

    riscv-non-isa/server-soc’s past year of commit activity
    TeX 22 CC-BY-4.0 8 1 0 Updated Feb 19, 2025
  • riscv-security-model Public

    RISC-V Security Model

    riscv-non-isa/riscv-security-model’s past year of commit activity
    Makefile 30 CC-BY-4.0 15 4 1 Updated Feb 19, 2025
  • riscv-non-isa/riscv-semihosting’s past year of commit activity
    Makefile 28 CC-BY-SA-4.0 9 1 1 Updated Feb 19, 2025
  • riscv-asm-manual Public

    RISC-V Assembly Programmer's Manual

    riscv-non-isa/riscv-asm-manual’s past year of commit activity
    Makefile 1,479 CC-BY-4.0 244 6 10 Updated Feb 19, 2025
  • riscv-sbi-doc Public

    Documentation for the RISC-V Supervisor Binary Interface

    riscv-non-isa/riscv-sbi-doc’s past year of commit activity
    Makefile 379 CC-BY-4.0 95 14 5 Updated Feb 19, 2025
  • riscv-acpi-ffh Public

    The repo will be used to hold the draft non-ISA RISC-V ACPI Functional Fixed Hardware (FFH) specification

    riscv-non-isa/riscv-acpi-ffh’s past year of commit activity
    Makefile 4 CC-BY-4.0 4 1 2 Updated Feb 19, 2025

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