revert ISA csv

riscv · Dec 10, 2024 · 768914f · 768914f
1 parent 8622d65
commit 768914f
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/src/csv/CHERI_CSR.csv b/src/csv/CHERI_CSR.csv
@@ -46,5 +46,5 @@ direct write if address didn't change","","✔","","","{cheri_default_ext_name}"
 "dinfc","0x7bd","","D","DRW","<<infinite-cap>>","Ignore","Ignore","","","","✔","Sdext","Source of <<infinite-cap>> capability in debug mode, writes are ignored","","","","","","","","","","","","","","","","","","","","",""
 "utidc","0x480","utid","U","Read: U, Write: U, <<asr_perm>>","tag=0, otherwise undefined","Update the CSR using <<SCADDR>>.","direct write","","","","✔","Zstid","User thread ID","","","","","","","","","","","","","","","","","","","","",""
 "stidc","0x580","stid","S","Read: S, Write: S, <<asr_perm>>","tag=0, otherwise undefined","Update the CSR using <<SCADDR>>.","direct write","","","","✔","Zstid","Supervisor thread ID","","","","","","","","","","","","","","","","","","","","",""
-"vstidc","0xA80","vstid","VS","Read: H, Write: H, <<asr_perm>>","tag=0, otherwise undefined","Update the CSR using <<SCADDR>>.","direct write","","","","✔","Zstid","Virtual supervisor thread ID","","","","","","","","","","","","","","","","","","","","",""
+"vstidc","0xA80","vstid","H","Read: VS, Write: VS, <<asr_perm>>","tag=0, otherwise undefined","Update the CSR using <<SCADDR>>.","direct write","","","","✔","Zstid","Virtual supervisor thread ID","","","","","","","","","","","","","","","","","","","","",
 "mtidc","0x780","mtid","M","Read: M, Write: M, <<asr_perm>>","tag=0, otherwise undefined","Update the CSR using <<SCADDR>>.","direct write","","","","✔","Zstid","Machine thread ID","","","","","","","","","","","","","","","","","","","","",""