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Fix observing CHERI execution mode code #506

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Fix observing CHERI execution mode code #506

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1 change: 1 addition & 0 deletions src/contributors.adoc
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Expand Up @@ -36,5 +36,6 @@ This RISC-V specification has been contributed to directly or indirectly by:
* Ricki Tura <[email protected]>
* Robert N. M. Watson <[email protected]>
* Toby Wenman <[email protected]>
* Jay Williams <[email protected]>
* Jonathan Woodruff <[email protected]>
* Jason Zhijingcheng Yu <[email protected]>
2 changes: 1 addition & 1 deletion src/riscv-hybrid-integration.adoc
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Expand Up @@ -109,7 +109,7 @@ for {cheri_cap_mode_name} and {INT_MODE_VALUE} for

```
auipc c1, 0
gctag x1, c1
gcmode x1, c1
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This is wrong though. AUIPC in integer mode gives you an integer not a capability. Hence the use of GCTAG to determine whether you got an integer or a capability.

Of course, the elephant in the room is that you've had to tell your assembler what mode you're in in order to assemble it in the first place, and if you lie to your assembler then generally speaking all bets are off (e.g. with RVC enabled it'll compress some instructions to encodings that mean different things between RV32 and RV64). Generally speaking you should never do this, and you'll always know what mode you're in anyway based on your execution environment. However, just as the privileged spec mentions how to probe XLEN (which has exactly the same, if not more, dodginess when it comes to running code assembled for one base ISA on another), I guess it's ok to have something here. But this may be worth (a) a disclaimer reminding people this is bad practice and dangerous (b) explaining why it's GCTAG (and that AUIPC is the integer form in integer mode).

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yep - this needs gctag instead. I guess this needs some words somewhere in the spec to clarify (I remember this came up recently - maybe it's just in an issue)

```

[#section_hybrid_ext_instructions]
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