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50 changes: 25 additions & 25 deletions specification/src/chapter4.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ non-security services.
==== Isolation model

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Expand Down Expand Up @@ -77,7 +77,7 @@ without the hypervisor extension for full Linux support.
See xref:chapter2.adoc#_reference_model[reference model].

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Expand Down Expand Up @@ -120,7 +120,7 @@ Isolation guarantees provided to software also apply to device initiated
transaction.

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Expand Down Expand Up @@ -158,7 +158,7 @@ See xref:chapter2.adoc#_security_lifecycle[security life cycle]. +
See https://github.com/riscv-non-isa/riscv-external-debug-security[RISC-V external debug security]

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Expand All @@ -177,7 +177,7 @@ See https://github.com/riscv-non-isa/riscv-external-debug-security[RISC-V extern
For example, external debug can be enabled for non-M-mode software without affecting M-mode (recoverable debug). And an S-mode OS can enable self-hosted debug for a user application without affecting other applications or S-mode itself.

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Expand All @@ -191,7 +191,7 @@ For example, disable self-hosted debug in a production system for certification
reasons.

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Expand All @@ -204,7 +204,7 @@ reasons.
Guarantees the system remains attestable.

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Expand Down Expand Up @@ -282,7 +282,7 @@ _Use case examples:_ mobile clients, and automotive.
A Global Platform TEE requires the following isolation guarantees:

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Expand Down Expand Up @@ -333,7 +333,7 @@ See xref:chapter3.adoc#_mmu[MMU]
See xref:chapter3.adoc#_mtt[MTT]

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Expand All @@ -359,7 +359,7 @@ TEE, and between TA within a TEE.
See xref:chapter2.adoc#_reference_model[reference model].

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Expand All @@ -381,7 +381,7 @@ TEE boot is typically based on:
The process can involve multiple stages (layered boot).

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Expand All @@ -406,7 +406,7 @@ Static partition TEE attestation is typically based on a direct security
platform attestation.

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Expand All @@ -427,7 +427,7 @@ Root domain, and SPM
* Separate guest TEE attestation(s) signed by SPM

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Expand All @@ -446,7 +446,7 @@ These services support local sealing of TA or guest TEE assets, and minimize
exposure of cryptographic materials.

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Expand Down Expand Up @@ -478,7 +478,7 @@ The security guarantees also apply to device initiated accesses, for example DMA
and interrupts.

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Expand Down Expand Up @@ -539,7 +539,7 @@ See xref:chapter2.adoc#_security_lifecycle[security life cycle]. +
See https://github.com/riscv-non-isa/riscv-external-debug-security[enhanced RISC-V external debug security]

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Expand Down Expand Up @@ -573,7 +573,7 @@ self-hosted debug of SPM (virtualized) or TEE OS (non-virtualized).
A machine mode monitor can enable external debug of individual supervisor domains without affecting M-mode, or any other supervisor domain.

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Expand All @@ -586,7 +586,7 @@ For example, for all of TEE domain on a production system, for certification
reasons.

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Expand Down Expand Up @@ -677,7 +677,7 @@ See xref:chapter3.adoc#_mmu[MMU]
See xref:chapter3.adoc#_mtt[MTT]

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Expand Down Expand Up @@ -717,7 +717,7 @@ without consent.
See xref:chapter2.adoc#_reference_model[reference model].

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Expand Down Expand Up @@ -746,7 +746,7 @@ Measuring confidential guests can be done by TSM in Confidential domain.
The process can involve multiple stages (layered boot).

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Expand Down Expand Up @@ -790,7 +790,7 @@ separation of concern:
* A confidential workload attestation, signed by TSM

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Expand Down Expand Up @@ -831,7 +831,7 @@ The security guarantees also apply to device initiated accesses, for example
DMA and interrupts.

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Expand Down Expand Up @@ -918,7 +918,7 @@ See xref:chapter2.adoc#_security_lifecycle[security life cycle]. +
See https://github.com/riscv-non-isa/riscv-external-debug-security[enhanced RISC-V external debug security]

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Expand Down Expand Up @@ -951,7 +951,7 @@ confidential guest. Only Root domain should enable self-hosted debug of TSM.
A machine mode monitor can enable external debug of individual supervisor domains without affecting M-mode, or any other supervisor domain.

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